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7130LA35CB
Renesas Electronics
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1 | The 7130 is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 | Ceramic Dual-In-Line Packages | 7130LA35CB |
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71V3556SA133BG
Renesas Electronics
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1 | The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers. | BGA | 71V3556SA133BG |
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71T75602S150BGG8
Renesas Electronics
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1 | The 71T75602 2.5V CMOS Synchronous SRAM organized as 512K x 36 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75602 contains data I/O, address and control signal registers. | BGA | 71T75602S150BGG8 |
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71T75902S85BGG8
Renesas Electronics
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1 | The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. | BGA | 71T75902S85BGG8 |
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71016S15PHGI8
Renesas Electronics
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1 | The 71016 5V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71016 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Small Outline Packages | 71016S15PHGI8 |
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71V632S6PFGI8
Renesas Electronics
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1 | The 71V632 3.3V CMOS SRAM is organized as 64K x 32. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz. The 71V632 SRAM contains write, data, address, and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. | Quad Flat Packages | 71V632S6PFGI8 |
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71321LA20JG8
Renesas Electronics
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1 | The 71321 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 71421 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low sta | Plastic Leaded Chip Carrier | 71321LA20JG8 |
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70V659S12BFI8
Renesas Electronics
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1 | The 70V659 is a high-speed 128K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each po | BGA | 70V659S12BFI8 |
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71V3577S80BQI8
Renesas Electronics
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1 | The 71V3577 3.3V CMOS SRAM is organized as 128K x 36. The 71V3577 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V3577S80BQI8 |
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71V65603S133PFGI
Renesas Electronics
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1 | The 71V65603 3.3V CMOS SRAM is organized as 256K X 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65603 contain data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM. | Quad Flat Packages | 71V65603S133PFGI |
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5962-3829417MXA
Renesas Electronics
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1 | The 5962-38294 (7164 SRAM) is organized as 8K x 8 and offers a reduced power standby mode. The low-power version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. | Ceramic Dual-In-Line Packages | 5962-3829417MXA |
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R1WV6416RSD-5SI#B0
Renesas Electronics
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1 | Support is limited to customers who have already adopted these products.Renesas is the worldwide #1 Low Power SRAM supplier with a full lineup and well balanced long term support. High density and high performance RAMs using Renesas's original technology, for example the Advanced LPSRAM new memory cell concept are offered. | Small Outline Packages | R1WV6416RSD-5SI#B0 |
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5962-9161707MXA
Renesas Electronics
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1 | The 5962-91617 (IDT 7025) is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML. | Other | 5962-9161707MXA |
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71V67803S150PFGI8
Renesas Electronics
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1 | The 71V67803 3.3V CMOS SRAM is organized as 512K x 18. The 71V67803 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. | Quad Flat Packages | 71V67803S150PFGI8 |
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R1WV6416RBG-5SI#S0
Renesas Electronics
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1 | Support is limited to customers who have already adopted these products.Renesas is the worldwide #1 Low Power SRAM supplier with a full lineup and well balanced long term support. High density and high performance RAMs using Renesas's original technology, for example the Advanced LPSRAM new memory cell concept are offered. | BGA | R1WV6416RBG-5SI#S0 |
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71V3556S100PFGI
Renesas Electronics
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1 | The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers. | Quad Flat Packages | 71V3556S100PFGI |
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71016S15YGI8
Renesas Electronics
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1 | The 71016 5V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71016 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Other | 71016S15YGI8 |
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71V30S55TF
Renesas Electronics
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1 | The 71V30 high-speed 1K x 8 Dual-Port Static RAM is designed to be used as a stand-alone 8-bit Dual-Port SRAM. It has two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. | Quad Flat Packages | 71V30S55TF |
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R1LV0108ESN-5SI#S1
Renesas Electronics
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1 | The R1LV0108E Series is a family of low voltage 1-Mbit static RAMs organized as 131, 072-word by 8-bit, fabricated by Renesas’s high-performance 0. 15um CMOS and TFT technologies. The R1LV0108E Series has realized higher density, higher performance and low power consumption. The R1LV0108E Series is suitable for memory applications where a simple interfacing, battery operating and battery backup are the important design objectives. It has been packaged in 32-pin SOP, 32-pin TSOP and 32-pin sTSOP. | Small Outline Packages | R1LV0108ESN-5SI#S1 |
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7024L20G
Renesas Electronics
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1 | The 7024 is a high-speed 4Kx 16 Dual-Port Static RAM designed to be used as a stand-alone 64K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available. | Other | 7024L20G |
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HM1-6514B/883
Renesas Electronics
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1 | The HM-6514/883 is a 1024 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. The device utilizes synchronous circuitry to achieve high performance and low power operation. On chip latches are provided for addresses allowing efficient interfacing with microprocessor systems. The data output can be forced to a high impedance state for use in expanded memory arrays. Gated inputs allow lower operating current and also eliminates the need for pull up or pull down resistors. The HM-6514/88 | Dual-In-Line Packages | HM1-6514B/883 |
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71V016SA15YGI8
Renesas Electronics
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1 | The 71V016 3.3V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71V016 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Other | 71V016SA15YGI8 |
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70T631S15BF
Renesas Electronics
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1 | The 70T631 is a high-speed 256K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode. | BGA | 70T631S15BF |
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71V124SA15TYG
Renesas Electronics
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1 | The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V124SA15TYG |
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7164L25YGI8
Renesas Electronics
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1 | The 7164 5V CMOS SRAM is organized as 8K x 8. The 7164 offers a reduced power standby mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs of the IDT7164 are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available. | Other | 7164L25YGI8 |
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