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AM1815AQ - Ambiq Micro, Inc.

Description: Real Time Clock (RTC) IC 16-VFQFN Exposed Pad

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PCB Footprints
AM1815AQ - Ambiq Micro, Inc. PCB footprint - Quad Flat No-Lead - Quad Flat No-Lead - 16-Pin QFN 3 x 3 mm
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3D Models
AM1815AQ - Ambiq Micro, Inc.  - 3D model - Quad Flat No-Lead - 16-Pin QFN 3 x 3 mm
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AM1815AQ Details

  • Manufacturer Part Number:

    AM1815AQ

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Contact Manufacturer

  • Package Description:

    QFN-16

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Manufacturer:

    Ambiq Micro

  • Clock Frequency-Max:

    2 MHz

  • Information Access Method:

    SERIAL(I2C), SERIAL, 4-WIRE/3-WIRE

  • JESD-30 Code:

    S-XQCC-N16

  • Length:

    3 mm

  • Moisture Sensitivity Level:

    1

  • Number of Terminals:

    16

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    UNSPECIFIED

  • Package Code:

    HVQCCN

  • Package Shape:

    SQUARE

  • Package Style:

    CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE

  • Peak Reflow Temperature (Cel):

    260

  • Seated Height-Max:

    0.9 mm

  • Supply Voltage-Max:

    3.6 V

  • Supply Voltage-Min:

    1.5 V

  • Supply Voltage-Nom:

    1.8 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    3 mm

  • uPs/uCs/Peripheral ICs Type:

    TIMER, REAL TIME CLOCK

AM1815AQ Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and a separate power plane is recommended. Keep the analog and digital sections separate, and use a ferrite bead or a 10uF capacitor to filter the power supply.
  • Use a high-quality crystal with a load capacitance of 10pF to 20pF. Ensure the crystal is placed close to the AM1815AQ, and use a 1kΩ to 2kΩ resistor in series with the crystal to limit the current.
  • Power up the VDD pin first, followed by the VBAT pin. Ensure VDD is stable before applying VBAT. The power-up sequence is critical to prevent latch-up and ensure proper operation.
  • The BOR function is enabled by default. To disable it, tie the BOR_EN pin to VSS. If enabled, the BOR threshold is 1.8V. You can adjust the threshold by connecting a resistor divider network to the BOR pin.
  • The maximum current consumption is 1.5mA in active mode and 1.5μA in sleep mode. However, this can vary depending on the clock frequency, voltage, and operating conditions.

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