ASMT-QABD-AEF0E footprint, schematic symbol and 3D model by Avago Technologies

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ASMT-QABD-AEF0E Details

Manufacturer Part Number:
ASMT-QABD-AEF0E
Pbfree Code:
Yes
Rohs Code:
Yes
Part Life Cycle Code:
Obsolete
Package Description:
3.20 X 2.80 MM, 1.90 MM HEIGHT, LEAD FREE, PLASTIC, SMT, LCC-4
Reach Compliance Code:
Compliant
HTS Code:
8541.40.20.00
Manufacturer:
Avago Technologies
YTEOL:
0
Additional Feature:
HIGH RELIABILITY
Color:
AMBER
Color@Wavelength:
Amber
Configuration:
SINGLE
Forward Current-Max:
0.15 A
Forward Voltage-Max:
2.95 V
Mounting Feature:
SURFACE MOUNT
Number of Functions:
1
Number of Terminals:
4
Operating Temperature-Max:
120 °C
Operating Temperature-Min:
-40 °C
Optoelectronic Device Type:
SINGLE COLOR LED
Overall Height:
1.9 mm
Packing Method:
TR, 7 INCH
Peak Wavelength:
596.2 nm
Reverse Voltage-Max:
5 V
Shape:
ROUND
Size:
2.4 mm
Surface Mount:
YES
Terminal Pitch:
1.5 mm
Viewing Angle:
120 deg

A 4-layer PCB with a solid ground plane and a separate power plane is recommended. Keep the signal traces short and away from noise sources. Use a 50-ohm impedance-controlled trace for the high-speed signals.
Ensure proper thermal management by providing adequate heat sinking and airflow. Follow the recommended operating conditions and derating guidelines. Use a thermal interface material (TIM) with a thermal conductivity of at least 1 W/m-K.
The input clock signal should be a differential signal with a frequency range of 25 MHz to 100 MHz. The signal should have a swing of 200 mV to 400 mV and a rise/fall time of 100 ps to 500 ps.
Use the power-down mode when the device is not in use. Adjust the clock frequency and voltage supply to the minimum required for the application. Use the built-in power-saving features, such as dynamic voltage and frequency scaling.
The internal voltage regulators should be set to the recommended values: VCC = 1.2 V, VCCA = 1.2 V, and VCCIO = 1.8 V or 3.3 V. Ensure the regulators are properly bypassed with 10 uF and 100 nF capacitors.

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