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BD13910STU - onsemi

Description: Mininum Current Gain - hFE = 63 @ IC = 150 mA; BD135, BD137, BD139 are complementary with BD136, BD138, BD140; These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant

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PCB Footprints
BD13910STU - onsemi PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO-126 3L
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BD13910STU - onsemi  - 3D model - Transistor Outline, Vertical - TO-126 3L
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BD13910STU Details

  • Manufacturer Part Number:

    BD13910STU

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    TO-126-3

  • Manufacturer Package Code:

    340AS

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Manufacturer:

    onsemi

  • YTEOL:

    0

  • Collector Current-Max (IC):

    1.5 A

  • Collector-Emitter Voltage-Max:

    80 V

  • Configuration:

    SINGLE

  • DC Current Gain-Min (hFE):

    63

  • JEDEC-95 Code:

    TO-126

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Polarity/Channel Type:

    NPN

  • Power Dissipation-Max (Abs):

    13 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    NO

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

  • Transition Frequency-Nom (fT):

    250 MHz

BD13910STU Frequently Asked Questions (FAQs)

  • A good PCB layout for the BD13910STU involves keeping the input and output traces short and separate, using a solid ground plane, and placing decoupling capacitors close to the device. A 4-layer PCB with a dedicated power plane and a solid ground plane is recommended.
  • To ensure the BD13910STU operates within its SOA, monitor the device's junction temperature, output current, and input voltage. Use thermal design and heat sinking to keep the junction temperature below 150°C. Also, ensure the output current is within the specified range, and the input voltage is within the recommended operating range.
  • For thermal design, consider the device's power dissipation, thermal resistance, and junction temperature. Use a heat sink with a low thermal resistance, ensure good thermal interface material (TIM) contact, and provide adequate airflow. A thermal design calculator or simulation tool can help optimize the design.
  • To protect the BD13910STU, use overvoltage protection (OVP) and overcurrent protection (OCP) circuits. OVP can be achieved using a voltage regulator or a zener diode, while OCP can be implemented using a current sense resistor and a comparator. Additionally, consider using a fuse or a polyfuse for added protection.
  • To minimize EMI and ensure EMC compliance, use a shielded enclosure, keep the PCB layout compact, and use a common-mode choke or ferrite beads on the input and output lines. Also, consider using a snubber circuit to reduce electromagnetic interference (EMI).

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BD13910STU Overview

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Part Image BD13910S Fairchild Semiconductor Corporation

Power Bipolar Transistor, 1.5A I(C), 80V V(BR)CEO, 1-Element, NPN, Silicon, TO-126, Plastic/Epoxy, 3 Pin

Part Image BD13910S onsemi

Power Bipolar Transistor, 1.5A I(C), 80V V(BR)CEO, 1-Element, NPN, Silicon, TO-126, Plastic/Epoxy, 3 Pin