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C2D20120D - Wolfspeed

Description: Wolfspeed C2D20120D, Dual SiC Schottky Diode, Common Cathode, 1200V 50A, 3-Pin TO-247

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PCB Footprints
C2D20120D - Wolfspeed PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO-247-3_1
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3D Models
C2D20120D - Wolfspeed  - 3D model - Transistor Outline, Vertical - TO-247-3_1
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C2D20120D Details

  • Manufacturer Part Number:

    C2D20120D

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    HALOGEN FREE AND ROHS COMPLIANT, TO-247, 3 PIN

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.10.00.80

  • Manufacturer:

    Wolfspeed

  • YTEOL:

    0

  • Application:

    EFFICIENCY

  • Case Connection:

    CATHODE

  • Configuration:

    COMMON CATHODE, 2 ELEMENTS

  • Diode Element Material:

    SILICON CARBIDE

  • Diode Type:

    RECTIFIER DIODE

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Non-rep Pk Forward Current-Max:

    250 A

  • Number of Elements:

    2

  • Number of Phases:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Output Current-Max:

    17 A

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Qualification Status:

    Not Qualified

  • Rep Pk Reverse Voltage-Max:

    1200 V

  • Surface Mount:

    NO

  • Technology:

    SCHOTTKY

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

C2D20120D Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for the C2D20120D is -55°C to 175°C.
  • To ensure proper biasing, follow the recommended biasing circuit and voltage levels outlined in the datasheet, and ensure that the device is operated within the recommended operating conditions.
  • A good PCB layout should minimize thermal resistance, ensure good heat dissipation, and reduce electromagnetic interference (EMI). A thermal management strategy should include a heat sink, thermal interface material, and a cooling system to maintain a safe operating temperature.
  • To handle high-frequency switching, use a layout that minimizes parasitic inductance and capacitance, and ensure that the device is properly decoupled from the power supply. Additionally, consider using a snubber circuit to reduce electromagnetic interference (EMI).
  • The C2D20120D is designed to be highly reliable and rugged, with a mean time to failure (MTTF) of >10^6 hours and a high level of resistance to electrostatic discharge (ESD) and electrical overstress (EOS).

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C2D20120D Overview

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