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C6D16065D - Wolfspeed

Description: 650 V, 16 A, TO-247-3 package, Industrial qualified, Discrete SiC Schottky Diode

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Symbol
C6D16065D - Wolfspeed - PCB symbol
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PCB Footprints
C6D16065D - Wolfspeed PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO-247-3L
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3D Models
C6D16065D - Wolfspeed - 3D model - Transistor Outline, Vertical - TO-247-3L
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C6D16065D Details

  • Manufacturer Part Number:

    C6D16065D

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.10.00.80

  • Manufacturer:

    Wolfspeed

  • YTEOL:

    6

  • Additional Feature:

    LOW LEAKAGE CURRENT, PD-CASE

  • Application:

    EFFICIENCY

  • Breakdown Voltage-Min:

    650 V

  • Case Connection:

    CATHODE

  • Configuration:

    COMMON CATHODE, 2 ELEMENTS

  • Diode Element Material:

    SILICON CARBIDE

  • Diode Type:

    RECTIFIER DIODE

  • Forward Voltage-Max (VF):

    1.5 V

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T3

  • Non-rep Pk Forward Current-Max:

    63 A

  • Number of Elements:

    2

  • Number of Phases:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Output Current-Max:

    32 A

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Peak Reflow Temperature (Cel):

    260

  • Power Dissipation-Max:

    100 W

  • Rep Pk Reverse Voltage-Max:

    650 V

  • Reverse Current-Max:

    40 µA

  • Reverse Test Voltage:

    650 V

  • Surface Mount:

    NO

  • Technology:

    SCHOTTKY

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    10

C6D16065D Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a thermal via array underneath the device is recommended. The thermal vias should be connected to a solid copper plane on the bottom layer to dissipate heat efficiently.
  • Ensure proper heat sinking, use a thermally conductive interface material, and follow the recommended PCB layout. Also, derate the device's power handling capability according to the temperature derating curve in the datasheet.
  • The maximum allowable voltage transient is 10% above the maximum rated voltage (Vds) for a duration of ≤ 100 ns. Exceeding this may cause device damage or degradation.
  • Yes, but ensure that the device is properly snubbed to limit voltage spikes. A snubber circuit can be used to reduce voltage transients and prevent device damage.
  • Handle the device with ESD-protective equipment, and ensure that the PCB has ESD protection circuits, such as TVS diodes or ESD-protection arrays, to prevent damage from static electricity.

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C6D16065D Overview

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