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CY7C1441KV33-133AXM - Infineon

Description: SRAM Sync SRAMs

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CY7C1441KV33-133AXM - Infineon PCB footprint - Quad Flat Packages - Quad Flat Packages - CY7C1441KV33-133AXM
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CY7C1441KV33-133AXM Details

  • Manufacturer Part Number:

    CY7C1441KV33-133AXM

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • ECCN Code:

    3A991.b.2.a

  • HTS Code:

    8542.32.00.41

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    8

  • Access Time-Max:

    6.5 ns

  • Additional Feature:

    FLOW-THROUGH ARCHITECTURE

  • JESD-30 Code:

    R-PQFP-G100

  • JESD-609 Code:

    e4

  • Length:

    20 mm

  • Memory Density:

    37748736 bit

  • Memory IC Type:

    CACHE SRAM

  • Memory Width:

    36

  • Moisture Sensitivity Level:

    3

  • Number of Functions:

    1

  • Number of Terminals:

    100

  • Number of Words:

    1048576 words

  • Number of Words Code:

    1000000

  • Operating Mode:

    SYNCHRONOUS

  • Operating Temperature-Max:

    125 °C

  • Operating Temperature-Min:

    -55 °C

  • Organization:

    1MX36

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LQFP

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLATPACK, LOW PROFILE

  • Parallel/Serial:

    PARALLEL

  • Peak Reflow Temperature (Cel):

    260

  • Screening Level:

    MIL-STD-883

  • Seated Height-Max:

    1.6 mm

  • Supply Voltage-Max (Vsup):

    3.6 V

  • Supply Voltage-Min (Vsup):

    3.135 V

  • Supply Voltage-Nom (Vsup):

    3.3 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 65 nm

  • Temperature Grade:

    MILITARY

  • Terminal Finish:

    Nickel/Palladium/Gold (Ni/Pd/Au)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    QUAD

  • Width:

    14 mm

CY7C1441KV33-133AXM Frequently Asked Questions (FAQs)

  • The CY7C1441KV33-133AXM has an operating temperature range of 0°C to 70°C.
  • The device has a built-in power-on reset (POR) circuit that ensures a clean power-up sequence. For power-down, it is recommended to follow a controlled shutdown sequence to prevent data corruption.
  • The CY7C1441KV33-133AXM supports a maximum clock frequency of 133 MHz.
  • The device supports DBI, which can be enabled or disabled through the DBI pin. Refer to the datasheet for specific implementation details.
  • The read latency is 2.5 clock cycles, and the write latency is 2 clock cycles.

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CY7C1441KV33-133AXM Overview

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