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DF2B5BSL,L3F - Toshiba

Description: 14V Clamp 8A Ipp Tvs Diode Surface Mount SL2

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PCB Footprints
DF2B5BSL,L3F - Toshiba PCB footprint - Other - Other - SL2_2021
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DF2B5BSL,L3F - Toshiba  - 3D model - Other - SL2_2021
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DF2B5BSL,L3F Details

  • Manufacturer Part Number:

    DF2B5BSL,L3F

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.10.00.50

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    Toshiba America Electronic Components

  • YTEOL:

    6

  • Breakdown Voltage-Max:

    6.5 V

  • Breakdown Voltage-Min:

    3.7 V

  • Breakdown Voltage-Nom:

    5.1 V

  • Clamping Voltage-Max:

    14 V

  • Configuration:

    SINGLE

  • Diode Element Material:

    SILICON

  • Diode Type:

    TRANS VOLTAGE SUPPRESSOR DIODE

  • JESD-30 Code:

    R-PDSO-N2

  • Non-rep Peak Rev Power Dis-Max:

    112 W

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Polarity:

    BIDIRECTIONAL

  • Reference Standard:

    IEC-61000-4-2, 4-5

  • Rep Pk Reverse Voltage-Max:

    3.3 V

  • Reverse Current-Max:

    0.1 µA

  • Reverse Test Voltage:

    3.3 V

  • Surface Mount:

    YES

  • Technology:

    AVALANCHE

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

DF2B5BSL,L3F Frequently Asked Questions (FAQs)

  • Toshiba recommends a PCB layout with a thermal pad connected to a large copper area on the bottom layer, and multiple vias to dissipate heat efficiently.
  • Toshiba suggests using a heat sink, ensuring good airflow, and following the recommended derating curves for high-temperature operation.
  • Although the datasheet specifies a maximum voltage of 5V, Toshiba recommends not exceeding 4.5V to ensure long-term reliability and prevent damage.
  • Yes, but Toshiba recommends using a suitable layout and following the recommended PCB design guidelines to minimize parasitic inductance and capacitance.
  • Toshiba recommends using ESD protection devices, such as TVS diodes or ESD arrays, and following proper handling and storage procedures to prevent ESD damage.

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