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ESDL2011PFCT5G - onsemi

Description: Low Clamping Voltage; Small Body Outline Dimensions: 0.60 mm x 0.30 mm; Low Body Height: 0.2 mm; Stand−off Voltage: 1.0 V; IEC61000−4−2 Level 4 ESD Protection; These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant; Low Capacitance 0.17 pF (Typ)

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ESDL2011PFCT5G - onsemi PCB footprint - Other - Other - ESDL2011PFCT5G-3
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ESDL2011PFCT5G - onsemi  - 3D model - Other - ESDL2011PFCT5G-3
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ESDL2011PFCT5G Details

  • Manufacturer Part Number:

    ESDL2011PFCT5G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    DFN-2

  • Package Description:

    DSN2, 2 PIN

  • Manufacturer Package Code:

    152AX

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.10.00.50

  • Date Of Intro:

    2018-05-15

  • Manufacturer:

    onsemi

  • YTEOL:

    0

  • Additional Feature:

    EXCELLENT CLAMPING CAPABILITY, LOW CAPACITANCE

  • Breakdown Voltage-Max:

    2.3 V

  • Breakdown Voltage-Min:

    1.4 V

  • Breakdown Voltage-Nom:

    1.65 V

  • Clamping Voltage-Max:

    6 V

  • Configuration:

    SINGLE, 1 CHANNEL

  • Diode Element Material:

    SILICON

  • Diode Type:

    TRANS VOLTAGE SUPPRESSOR DIODE

  • JESD-30 Code:

    R-PDSO-N2

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity:

    BIDIRECTIONAL

  • Power Dissipation-Max:

    0.313 W

  • Reference Standard:

    IEC-61000-4-2, 4-5

  • Rep Pk Reverse Voltage-Max:

    1 V

  • Reverse Current-Max:

    0.5 µA

  • Reverse Test Voltage:

    1 V

  • Surface Mount:

    YES

  • Technology:

    AVALANCHE

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

ESDL2011PFCT5G Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and a separate power plane is recommended. Keep the signal traces short and away from the power plane to minimize noise coupling.
  • The ESDL2011PFCT5G requires a bias voltage of 5V ± 10% and a bias current of 10mA ± 10%. Ensure the bias voltage is stable and noise-free, and use a low-ESR capacitor to decouple the bias voltage.
  • The ESDL2011PFCT5G is rated for operation from -40°C to +125°C. However, the device's performance may degrade at extreme temperatures, so it's essential to ensure proper thermal management and heat sinking.
  • The ESDL2011PFCT5G has built-in ESD protection, but it's still essential to follow proper ESD handling procedures during assembly and testing. Use an ESD wrist strap or mat, and ensure the PCB is properly grounded.
  • Store the ESDL2011PFCT5G in a dry, cool place, away from direct sunlight and moisture. Handle the device by the body, not the leads, and avoid bending or flexing the leads.

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ESDL2011PFCT5G Overview

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