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FDWS9508L-F085 - onsemi

Description: Typical RDS(on) = 3.6 mΩ at VGS = - 10V, ID = - 80 A; Typical Qg(tot) = 82 nC at VGS = - 10V, ID = - 80 A; UIS Capability; RoHS Compliant; Qualified to AEC Q101; Wettable flanks for automatic optical inspection (AOI)

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FDWS9508L-F085 - onsemi  - 3D model
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FDWS9508L-F085 Details

  • Manufacturer Part Number:

    FDWS9508L-F085

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    DFNW-8

  • Package Description:

    QFN-8

  • Manufacturer Package Code:

    507AU

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    4 Weeks

  • Date Of Intro:

    2017-11-02

  • Manufacturer:

    onsemi

  • YTEOL:

    0

  • Avalanche Energy Rating (Eas):

    211 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    40 V

  • Drain Current-Max (ID):

    80 A

  • Drain-source On Resistance-Max:

    0.0085 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    MO-240

  • JESD-30 Code:

    R-PDSO-F5

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    5

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    214 W

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Max (toff):

    780 ns

  • Turn-on Time-Max (ton):

    23 ns

FDWS9508L-F085 Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and thermal vias is recommended. Ensure a minimum of 1mm clearance around the device for airflow and heat dissipation. Use thermal interface material (TIM) and a heat sink if possible.
  • Implement a robust power-on reset (POR) circuit, ensure a stable input voltage, and consider using a thermistor or thermocouple to monitor temperature. Also, ensure the device is properly soldered and the PCB is designed for thermal stress.
  • Critical timing parameters include the clock frequency, clock duty cycle, and input signal rise/fall times. Ensure proper synchronization by using a clock signal with a stable frequency and duty cycle, and by implementing a clock domain crossing (CDC) circuit if necessary.
  • Use a shielded enclosure, ensure proper PCB layout and grounding, and consider using EMI filters or common-mode chokes. Also, follow onsemi's recommended layout and design guidelines for EMI reduction.
  • Use a pi-filter (R-C-R) or a T-filter (L-C-R) for input filtering, and consider adding a ferrite bead or a common-mode choke for additional noise reduction. For output filtering, use a low-pass filter (R-C) or a pi-filter to reduce electromagnetic emissions.

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FDWS9508L-F085 Overview

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