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HSSR-7110#300 - Avago Technologies

Description: Solid State Relays - PCB Mount 90V/1.0 ohm MOSFET Hermetically sealed

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HSSR-7110#300 - Avago Technologies PCB footprint - Small Outline Packages - Small Outline Packages - HSSR-7110
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HSSR-7110#300 - Avago Technologies  - 3D model - Small Outline Packages - HSSR-7110
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HSSR-7110#300 Details

  • Manufacturer Part Number:

    HSSR-7110#300

  • Pbfree Code:

    No

  • Rohs Code:

    No

  • Part Life Cycle Code:

    Active

  • Package Description:

    GULL WING, HERMETICALLY SEALED, DIP-8

  • Reach Compliance Code:

    Compliant

  • ECCN Code:

    3A001.a.2.c

  • HTS Code:

    8541.40.80.00

  • Manufacturer:

    Avago Technologies

  • YTEOL:

    4

  • Additional Feature:

    HIGH RELIABILITY, MIL-STD-883

  • Configuration:

    SINGLE

  • Forward Current-Max:

    0.02 A

  • Forward Voltage-Max:

    1.7 V

  • Isolation Voltage-Max:

    1500 V

  • JESD-609 Code:

    e0

  • Mounting Feature:

    SURFACE MOUNT

  • Number of Elements:

    1

  • On-State Current-Max:

    0.8 A

  • Operating Temperature-Max:

    125 °C

  • Operating Temperature-Min:

    -55 °C

  • Optoelectronic Device Type:

    FET OUTPUT OPTOCOUPLER

  • Power Dissipation-Max:

    0.8 W

  • Response Time-Max:

    0.006 s

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin/Lead (Sn/Pb)

HSSR-7110#300 Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and a separate power plane is recommended. Keep the signal traces short and away from noise sources. Use a common mode filter or a ferrite bead to reduce EMI.
  • Use a thermal management system to keep the device within the recommended operating temperature range (0°C to 70°C). Ensure good airflow, and consider using a heat sink or thermal interface material if necessary.
  • The input clock signal should be a 25 MHz crystal oscillator with a ±50 ppm frequency tolerance. The clock signal should be connected to the XTAL_IN pin, and the XTAL_OUT pin should be left unconnected.
  • To minimize power consumption, set the device to the lowest possible frequency (e.g., 10 MHz) and disable any unused features. Use the power-down mode (PDN) to reduce power consumption when the device is not in use.
  • The internal voltage regulator should be set to 1.2 V for the core voltage (VDDC) and 1.8 V for the I/O voltage (VDDIO). Ensure that the input voltage (VIN) is within the recommended range (1.71 V to 1.89 V).

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