IRS2117SPBF footprint, schematic symbol and 3D model by Infineon

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IRS2117SPBF Details

The IRS2117SPBF can operate up to 600 kHz, but the recommended operating frequency is up to 400 kHz for optimal performance.
The bootstrap capacitor should be charged through a resistor (e.g., 1 kΩ) connected between the bootstrap pin and the high-side supply voltage (VCC). The capacitor value should be at least 10 nF to ensure proper charging.
The deadtime (DT) pin is used to adjust the deadtime between the high-side and low-side switches. A shorter deadtime reduces switching losses, but may increase the risk of shoot-through currents. A longer deadtime reduces shoot-through currents, but increases switching losses.
The IRS2117SPBF has a built-in overcurrent protection (OCP) feature. The OCP threshold can be set using an external resistor (R_OCP) connected between the OCP pin and ground. The device will shut down if the current exceeds the set threshold.
A good layout and PCB design for the IRS2117SPBF should minimize parasitic inductance and capacitance. Keep the high-frequency loops small, use a solid ground plane, and place the bootstrap capacitor close to the IC. Use a 4-layer PCB with a dedicated power plane and a separate ground plane.

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