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MCP6487-E/SN - Microchip

Description: Operational Amplifiers - Op Amps Dual, 10MHz Op Amp, E Temp

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PCB Footprints
MCP6487-E/SN - Microchip PCB footprint - Small Outline Packages - Small Outline Packages - 8-LEAD PLASTIC SMALL OUTLINE(SN)-Narrow, 3.90 mm Body [SOIC]
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3D Models
MCP6487-E/SN - Microchip  - 3D model - Small Outline Packages - 8-LEAD PLASTIC SMALL OUTLINE(SN)-Narrow, 3.90 mm Body [SOIC]
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MCP6487-E/SN Details

  • Manufacturer Part Number:

    MCP6487-E/SN

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Pin Count:

    8

  • Manufacturer Package Code:

    SOIC-8

  • Country Of Origin:

    Thailand

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.33.00.01

  • Factory Lead Time:

    6 Weeks

  • Manufacturer:

    Microchip Technology Inc

  • YTEOL:

    23

  • Amplifier Type:

    OPERATIONAL AMPLIFIER

  • Architecture:

    VOLTAGE-FEEDBACK

  • Common-mode Reject Ratio-Min:

    66 dB

  • Common-mode Reject Ratio-Nom:

    110 dB

  • Frequency Compensation:

    YES

  • Input Offset Voltage-Max:

    1600 µV

  • JESD-30 Code:

    R-PDSO-G8

  • JESD-609 Code:

    e3

  • Length:

    4.9 mm

  • Low-Bias:

    NO

  • Low-Offset:

    NO

  • Micropower:

    YES

  • Moisture Sensitivity Level:

    1

  • Number of Functions:

    2

  • Number of Terminals:

    8

  • Operating Temperature-Max:

    125 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    SOP

  • Package Equivalence Code:

    SOP8,.25

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUT LINE

  • Peak Reflow Temperature (Cel):

    260

  • Power:

    NO

  • Programmable Power:

    NO

  • Seated Height-Max:

    1.75 mm

  • Slew Rate-Nom:

    20 V/us

  • Supply Current-Max:

    1.44 mA

  • Supply Voltage Limit-Max:

    6 V

  • Supply Voltage-Nom (Vsup):

    5 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    1.27 mm

  • Terminal Position:

    DUAL

  • Unity Gain BW-Nom:

    10000

  • Voltage Gain-Min:

    177827.941

  • Wideband:

    NO

  • Width:

    3.9 mm

MCP6487-E/SN Frequently Asked Questions (FAQs)

  • The maximum power dissipation of the MCP6487-E/SN is dependent on the package type and ambient temperature. For the SOIC package, the maximum power dissipation is 720mW at 25°C ambient temperature. For the MSOP package, it is 560mW at 25°C ambient temperature.
  • To ensure stability in a unity-gain configuration, it is recommended to add a capacitor (typically 10-100pF) between the output and the inverting input pins. This helps to compensate for the internal pole and ensures stability.
  • To minimize noise and EMI, it is recommended to follow good PCB layout practices, such as keeping the input and output traces short and away from each other, using a solid ground plane, and avoiding vias under the op-amp package. Additionally, decoupling capacitors should be placed close to the op-amp power pins.
  • The MCP6487-E/SN is rated for operation up to 125°C, but the maximum junction temperature should not exceed 150°C. It is recommended to derate the power dissipation and ensure proper heat sinking to prevent overheating in high-temperature environments.
  • The choice of resistors for the feedback network depends on the desired gain and bandwidth. A good starting point is to choose resistors with a ratio that matches the desired gain, and then adjust the values to optimize the frequency response. It is also important to consider the op-amp's input impedance and output impedance when selecting the resistors.

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MCP6487-E/SN Overview

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About Microchip

Microchip Technology Inc. is a leading manufacturer of microcontrollers and semiconductor devices for a wide range of applications in the aerospace, automotive, consumer electronics, industrial, and medical industries. Alongside a comprehensive product portfolio, Microchip Technology Inc. also provides easy-to-use development tools that enable engineers to create optimal designs quickly with minimal iterations to reduce risk while lowering total system costs to market. Headquartered in Chandler, Arizona, th

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