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MP2013AGG-Z - Monolithic Power Systems (MPS)

Description: LDO Voltage Regulators 40V,150mA,Low Quiescent Current Linear Regulator

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PCB Footprints
MP2013AGG-Z - Monolithic Power Systems (MPS) PCB footprint - Small Outline No-lead - Small Outline No-lead - QFN6 (2mmx2mm)
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3D Models
MP2013AGG-Z - Monolithic Power Systems (MPS)  - 3D model - Small Outline No-lead - QFN6 (2mmx2mm)
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MP2013AGG-Z Details

  • Manufacturer Part Number:

    MP2013AGG-Z

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    QFN-6

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Factory Lead Time:

    20 Weeks

  • Manufacturer:

    Monolithic Power Systems

  • YTEOL:

    6.2

  • Adjustability:

    ADJUSTABLE

  • Dropout Voltage1-Max:

    0.85 V

  • Dropout Voltage1-Nom:

    0.6 V

  • JESD-30 Code:

    S-PDSO-N6

  • Length:

    2 mm

  • Line Regulation-Max (%/V):

    0.05

  • Load Regulation-Max(%):

    1.499%

  • Number of Functions:

    1

  • Number of Outputs:

    1

  • Number of Terminals:

    6

  • Operating Temperature TJ-Max:

    125 °C

  • Operating Temperature TJ-Min:

    -40 °C

  • Output Current1-Max:

    0.15 A

  • Output Voltage1-Max:

    15 V

  • Output Voltage1-Min:

    1.215 V

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    HVSON

  • Package Equivalence Code:

    SOLCC6,.08,25

  • Package Shape:

    SQUARE

  • Package Style:

    SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE

  • Packing Method:

    TR

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Regulator Type:

    ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR

  • Seated Height-Max:

    1 mm

  • Surface Mount:

    YES

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Width:

    2 mm

MP2013AGG-Z Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. Keep the thermal path short and use a thermal pad on the bottom of the IC.
  • Ensure the output capacitor has a low ESR, use a minimum of 10uF output capacitance, and add a 1-2nF ceramic capacitor in parallel with the output capacitor to prevent oscillations.
  • The maximum input voltage is 26V, but it's recommended to keep it below 24V for optimal performance and reliability.
  • The device is rated for operation up to 125°C, but derating is required above 85°C. Ensure proper thermal design and consider using a heat sink if operating in high-temperature environments.
  • The output voltage can be adjusted by changing the resistor divider ratio (R1 and R2) connected to the FB pin. Use the formula in the datasheet to calculate the required resistor values.

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MP2013AGG-Z Overview

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