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MP850-0.20-1% - Caddock

Description: Caddock MP800 Series TO-220 Solder Thick Film Resistor 0.2Ω 1% 50W 0 → +200ppm/°C

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PCB Footprints
MP850-0.20-1% - Caddock PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO-220 Style
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3D Models
MP850-0.20-1% - Caddock  - 3D model - Transistor Outline, Vertical - TO-220 Style
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MP850-0.20-1% Details

  • Manufacturer Part Number:

    MP850-0.20-1%

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    TO-220

  • Reach Compliance Code:

    Compliant

  • Country Of Origin:

    USA

  • ECCN Code:

    EAR99

  • HTS Code:

    8533.29.00.00

  • Manufacturer:

    Caddock Electronics Inc

  • YTEOL:

    8

  • Additional Feature:

    FREE AIR POWER : 2.25W

  • Construction:

    Rectangular

  • JESD-609 Code:

    e3

  • Lead Length:

    12.7 mm

  • Lead Spacing:

    5.08 mm

  • Mounting Feature:

    THROUGH HOLE MOUNT

  • Number of Terminals:

    2

  • Operating Temperature-Max:

    150 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Height:

    16.26 mm

  • Package Length:

    10.41 mm

  • Package Shape:

    RECTANGULAR PACKAGE

  • Package Style:

    Radial

  • Package Width:

    3.18 mm

  • Packing Method:

    TUBE

  • Rated Power Dissipation (P):

    50 W

  • Rated Temperature:

    25 °C

  • Resistance:

    0.2 Ω

  • Resistor Type:

    FIXED RESISTOR

  • Surface Mount:

    NO

  • Technology:

    METAL GLAZE/THICK FILM

  • Temperature Coefficient:

    0,200 ppm/°C

  • Terminal Finish:

    MATTE TIN OVER NICKEL

  • Terminal Shape:

    FLAT

  • Tolerance:

    1%

  • Working Voltage:

    300 V

MP850-0.20-1% Frequently Asked Questions (FAQs)

  • The recommended PCB footprint for the MP850-0.20-1% is a rectangular pad with dimensions of 0.25 inches (6.4 mm) x 0.15 inches (3.8 mm) with a 0.05 inches (1.3 mm) radius corner.
  • To ensure reliability in high-temperature applications, it is recommended to derate the power rating of the MP850-0.20-1% by 1.5% per degree Celsius above 25°C. Additionally, ensure good thermal conductivity between the device and the PCB or heat sink.
  • The maximum allowable voltage imbalance across the MP850-0.20-1% is ±10% of the rated voltage. Exceeding this limit may affect the device's accuracy and reliability.
  • While the MP850-0.20-1% is designed for DC applications, it can be used in low-frequency AC applications up to 400 Hz. However, for high-frequency applications above 400 Hz, it is recommended to consult with Caddock Electronics Inc. or use a different device specifically designed for high-frequency use.
  • To prevent damage, store the MP850-0.20-1% in its original packaging or a similar ESD-protective package. Handle the device by the body, avoiding touching the leads or electrical contacts. Use an anti-static wrist strap or mat when handling the device.

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MP850-0.20-1% Overview

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