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NL37WZ14USG - onsemi

Description: Designed for 1.65 V to 5.5 V VCC Operation; Over Voltage Tolerant Inputs and Outputs; LVTTL Compatible – Interface Capability with 5 V TTL Logic with VCC = 3 V; LVCMOS Compatible; 24 mA Balanced Output Sink and Source Capability; Near Zero Static Supply Current Substantially Reduces System Power Requirements; Current Drive Capability is 24 mA at the Outputs; Chip Complexity: FETs = 94; Pb-Free Package is Available

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NL37WZ14USG - onsemi PCB footprint - Small Outline Packages - Small Outline Packages - US8 CASE 493 ISSUE D
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NL37WZ14USG - onsemi  - 3D model - Small Outline Packages - US8 CASE 493 ISSUE D
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NL37WZ14USG Details

  • Manufacturer Part Number:

    NL37WZ14USG

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    US8

  • Package Description:

    US-8

  • Pin Count:

    8

  • Manufacturer Package Code:

    493-01

  • Country Of Origin:

    Mainland China, Malaysia

  • HTS Code:

    8542.39.00.60

  • Factory Lead Time:

    10 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    6.15

  • Family:

    LVC/LCX/Z

  • JESD-30 Code:

    R-PDSO-G8

  • Length:

    2.3 mm

  • Load Capacitance (CL):

    50 pF

  • Logic IC Type:

    INVERTER

  • Max I(ol):

    0.032 A

  • Moisture Sensitivity Level:

    1

  • Number of Functions:

    3

  • Number of Inputs:

    1

  • Number of Terminals:

    8

  • Operating Temperature-Max:

    125 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    VSSOP

  • Package Equivalence Code:

    TSSOP8,.12,20

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH

  • Packing Method:

    TR

  • Peak Reflow Temperature (Cel):

    260

  • Power Supply Current-Max (ICC):

    0.01 mA

  • Prop. Delay@Nom-Sup:

    7.5 ns

  • Propagation Delay (tpd):

    8 ns

  • Qualification Status:

    Not Qualified

  • Schmitt Trigger:

    YES

  • Seated Height-Max:

    0.9 mm

  • Supply Voltage-Max (Vsup):

    5.5 V

  • Supply Voltage-Min (Vsup):

    1.65 V

  • Supply Voltage-Nom (Vsup):

    3.3 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Terminal Finish:

    Nickel/Gold/Palladium (Ni/Au/Pd)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    2 mm

NL37WZ14USG Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane, separate analog and digital power planes, and a star-connection for the analog and digital grounds is recommended. Keep the analog and digital signal traces separate and avoid crossing them.
  • Route the clock signal close to the ADC, use a low-impedance path, and avoid crossing the clock signal with other signals. Use a clock signal with a rise time < 1 ns and a frequency tolerance of ±100 ppm.
  • Power up the analog supply (VCCA) first, followed by the digital supply (VCCD), and then the clock signal. Power down in the reverse order.
  • The NL37WZ14USG outputs data in a 14-bit, two's complement format. Ensure your system can handle this format, and consider using a FIFO or buffer to handle the high-speed data output.
  • The maximum capacitive load for the ADC's output drivers is 10 pF. Exceeding this limit may affect the signal integrity and increase the risk of metastability.

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NL37WZ14USG Overview

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