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NVLJWD040N06CLTAG - onsemi

Description: Mosfet Array 60V 5.5A (Ta), 18A (Tc) 2.2W (Ta), 24W (Tc) Surface Mount, Wettable Flank 6-WDFNW (2.2x2.3) , -55°C ~ 175°C (TJ)

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PCB Footprints
NVLJWD040N06CLTAG - onsemi PCB footprint - Other - Other - WDFNW6 2.2x2.3, 0.8P CASE 515AS ISSUE O_2026
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NVLJWD040N06CLTAG - onsemi  - 3D model - Other - WDFNW6 2.2x2.3, 0.8P CASE 515AS ISSUE O_2026
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NVLJWD040N06CLTAG Details

  • Manufacturer Part Number:

    NVLJWD040N06CLTAG

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    WDFNW6 2.2x2.3, 0.8P

  • Package Description:

    WDFNW6, 6 PIN

  • Manufacturer Package Code:

    515AS

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    15 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    5

  • Avalanche Energy Rating (Eas):

    27 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    60 V

  • Drain Current-Max (ID):

    5.5 A

  • Drain-source On Resistance-Max:

    0.05 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    3 pF

  • JESD-30 Code:

    R-PDSO-N6

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    2

  • Number of Terminals:

    6

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Packing Method:

    TR

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    24 W

  • Pulsed Drain Current-Max (IDM):

    54 A

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

NVLJWD040N06CLTAG Frequently Asked Questions (FAQs)

  • The recommended PCB layout for optimal thermal performance involves using a minimum of 2 oz copper thickness, a thermal relief pattern under the device, and a solid copper pour on the top and bottom layers. Additionally, it's recommended to use vias to connect the thermal pad to the thermal relief pattern.
  • To ensure the device is properly biased, make sure to follow the recommended biasing scheme outlined in the datasheet. This typically involves connecting the gate to a voltage source through a resistor, and ensuring the drain-source voltage is within the recommended range.
  • Operating the device beyond the recommended temperature range can lead to reduced performance, decreased lifespan, and potentially even device failure. It's essential to ensure the device is operated within the recommended temperature range to maintain optimal performance and reliability.
  • To handle ESD protection for this device, it's recommended to follow proper ESD handling procedures during assembly and storage. Additionally, consider implementing ESD protection circuits or devices on the PCB to prevent damage from electrostatic discharge.
  • The recommended soldering conditions for this device involve using a soldering iron with a temperature range of 250°C to 260°C, and a soldering time of 3-5 seconds. It's also essential to use a solder with a melting point above 217°C to prevent damage to the device.

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NVLJWD040N06CLTAG Overview

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