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NVLJWS6D0N04CLTAG - onsemi

Description: UDFN Package with Exposed Drain Pads; Low Profile UDFN 2.0x2.0x0.55 mm ; Ultra Low RDS(on); Optimized Gate Charge; Low Capacitance; AEC−Q101 Qualified and PPAP Capable; RoHS Compliant

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PCB Footprints
NVLJWS6D0N04CLTAG - onsemi PCB footprint - Other - Other - WDFNW6 2.05x2.05, 0.65P CASE 515AD ISSUE O
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3D Models
NVLJWS6D0N04CLTAG - onsemi  - 3D model - Other - WDFNW6 2.05x2.05, 0.65P CASE 515AD ISSUE O
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NVLJWS6D0N04CLTAG Details

  • Manufacturer Part Number:

    NVLJWS6D0N04CLTAG

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    WDFNW6 2.05x2.05, 0.65P

  • Package Description:

    WDFNW-6

  • Manufacturer Package Code:

    515AD

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    15 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    5.6

  • Avalanche Energy Rating (Eas):

    113 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    40 V

  • Drain Current-Max (ID):

    68 A

  • Drain-source On Resistance-Max:

    0.008 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    18 pF

  • JESD-30 Code:

    S-PDSO-N6

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    6

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    SQUARE

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    46 W

  • Pulsed Drain Current-Max (IDM):

    277 A

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

NVLJWS6D0N04CLTAG Frequently Asked Questions (FAQs)

  • The recommended PCB layout for optimal thermal performance involves using a 2-layer or 4-layer board with a solid ground plane, placing thermal vias under the device, and using a thermal pad on the bottom of the package. Refer to the onsemi application note AND9093/D for more details.
  • To ensure reliable operation in high-temperature environments, follow the recommended operating conditions, use a suitable heat sink, and ensure good thermal conductivity between the device and the heat sink. Also, consider derating the device's power handling capabilities according to the temperature derating curve provided in the datasheet.
  • The NVLJWS6D0N04CLTAG has built-in ESD protection, but it's still recommended to follow proper ESD handling procedures during assembly and testing. Use an ESD wrist strap or mat, and ensure that the device is handled in a static-safe environment.
  • Yes, the NVLJWS6D0N04CLTAG is qualified for automotive and high-reliability applications. It meets the AEC-Q101 qualification standard and is manufactured using a robust process that ensures high reliability and low defect rates.
  • The recommended soldering profile for the NVLJWS6D0N04CLTAG involves a peak temperature of 260°C, with a dwell time of 30-60 seconds above 220°C. Refer to the onsemi application note AND9095/D for more details on the recommended soldering profile.

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NVLJWS6D0N04CLTAG Overview

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