R5F11Y67ASM#10 - Renesas Electronics
Description: Ultra-low power consumption technology ● VDD = single power supply voltage of 2.0 to 5.5 V (Use this product within the voltage range from 2.25 to 5.5 V because the detection voltage (VSPOR) of the selectable power-on-reset (SPOR) circuit should also be considered.) ● HALT mode ● STOP mode RL78 CPU core ● CISC architecture with 3-stage pipeline ● Minimum instruction execution time: Can be changed from high speed (0.05 µs: @ 20 MHz operation with high-speed on-chip oscillator) to low speed (1.0 µ
