R7F100LGL3CNP#HA0 - Renesas Electronics
Description: Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode High-speed wakeup from the STOP mode is possible. SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high speed (0.03125 µs @ 32 MHz operation with the high-speed on-chip oscillator clock) to ultra-low speed (30.5 µs @ 32.768 kHz operation with the subsystem clock) Multiply/divide/multiply & accumulate instruc
