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SI3404-A-GM - Skyworks

Description: Power Switch ICs - POE/LAN IEEE 802.3af Type 1 PD interface with high efficiency dc-dc converter and compact footprint

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PCB Footprints
SI3404-A-GM - Skyworks PCB footprint - Quad Flat No-Lead - Quad Flat No-Lead - Si3404
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3D Models
SI3404-A-GM - Skyworks  - 3D model - Quad Flat No-Lead - Si3404
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SI3404-A-GM Details

  • Manufacturer Part Number:

    SI3404-A-GM

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    QFN-20

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Manufacturer:

    Skyworks Solutions Inc

  • YTEOL:

    8

  • Adjustable Threshold:

    NO

  • Analog IC - Other Type:

    DIGITAL POWER CONTROLLER

  • JESD-30 Code:

    S-XQCC-N20

  • JESD-609 Code:

    e3

  • Length:

    4 mm

  • Moisture Sensitivity Level:

    3

  • Number of Functions:

    1

  • Number of Terminals:

    20

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    UNSPECIFIED

  • Package Code:

    HVQCCN

  • Package Equivalence Code:

    LCC20,.16SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE

  • Peak Reflow Temperature (Cel):

    260

  • Seated Height-Max:

    0.9 mm

  • Supply Voltage-Max (Vsup):

    57 V

  • Supply Voltage-Min (Vsup):

    1.5 V

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Time@Peak Reflow Temperature-Max (s):

    40

  • Width:

    4 mm

SI3404-A-GM Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and thermal vias is recommended. Ensure a minimum of 1mm clearance around the device for heat dissipation. Use a thermal pad on the bottom of the device and connect it to a thermal plane on the PCB.
  • Use a Smith chart or a network analyzer to optimize the input and output matching networks. The device's input and output impedances are 50 ohms, so a conjugate match is recommended. Use a pi-network or a T-network topology for the matching circuits.
  • A resistive divider network is recommended for biasing the device. Set the quiescent current by adjusting the voltage on the Vbias pin. A typical quiescent current is around 10-20mA. Ensure the voltage on the Vbias pin is within the recommended range of 2.5-5V.
  • Ensure the device is operated within the recommended frequency range. Use a stabilizing capacitor (typically 10-100pF) between the output and ground. Avoid using a capacitor with a high ESL (equivalent series inductance) as it can cause oscillations.
  • Use a TVS (transient voltage suppressor) diode or a zener diode with a voltage rating above the maximum operating voltage of the device. Connect the ESD protection device between the input/output pins and ground. Ensure the ESD protection device has a low capacitance to minimize signal degradation.

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SI3404-A-GM Overview

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