The recommended land pattern for SMDTC04100QB00KP00 is a rectangular pad with a size of 4.5mm x 2.5mm, with a solder mask clearance of 0.2mm.
Handle the component by the edges, avoid touching the capacitive surfaces, and use an anti-static wrist strap or mat to prevent electrostatic discharge (ESD) damage.
The maximum allowable voltage derating for SMDTC04100QB00KP00 is 80% of the rated voltage, which is 250V for this specific component.
Yes, SMDTC04100QB00KP00 is suitable for high-frequency applications up to 100 MHz, but the impedance and ESR values should be considered in the design.
SMDTC04100QB00KP00 is designed to operate up to 125°C, but the capacitance value and ESR may change with temperature. Consult the datasheet for temperature derating curves.
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SMDTC04100QB00KP00 Overview
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