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SPD15P10PGBTMA1 - Infineon

Description: P-Channel 100 V 15A (Tc) 128W (Tc) Surface Mount PG-TO252-3

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PCB Footprints
SPD15P10PGBTMA1 - Infineon PCB footprint - Other - Other - PG-TO-252-3_2024-1
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SPD15P10PGBTMA1 Details

  • Manufacturer Part Number:

    SPD15P10PGBTMA1

  • Pbfree Code:

    No

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Not Recommended

  • Part Package Code:

    TO-252AA

  • Package Description:

    GREEN, PLASTIC, TO-252, 3 PIN

  • Pin Count:

    4

  • Country Of Origin:

    Austria, Malaysia

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    10 Weeks

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    0

  • Additional Feature:

    AVALANCHE RATED

  • Avalanche Energy Rating (Eas):

    230 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    100 V

  • Drain Current-Max (ID):

    15 A

  • Drain-source On Resistance-Max:

    0.24 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    TO-252AA

  • JESD-30 Code:

    R-PSSO-G2

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Polarity/Channel Type:

    P-CHANNEL

  • Pulsed Drain Current-Max (IDM):

    60 A

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Transistor Element Material:

    SILICON

SPD15P10PGBTMA1 Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. The device should be placed near a thermal pad or heat sink to ensure good heat dissipation.
  • Ensure proper heat sinking, use a thermal interface material (TIM) with a thermal conductivity of at least 1 W/mK, and follow the recommended PCB layout guidelines. Also, consider using a thermocouple to monitor the device temperature.
  • The maximum allowed voltage on the gate driver output is 15V, as specified in the datasheet. Exceeding this voltage may damage the device.
  • Yes, the SPD15P10PGBTMA1 can be used in a half-bridge configuration. However, ensure that the device is properly biased and that the bootstrap capacitor is correctly sized to prevent voltage overshoot.
  • Check the input voltage, ensure proper gate drive signals, and verify that the device is properly biased. Also, check for any signs of overheating or electrical overstress.

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