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TC4001BP(N,F) - Toshiba

Description: Toshiba TC4001BP(N,F), Quad 2-Input NOR Logic Gate, 3 → 18 V, 14-Pin PDIP

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PCB Footprints
TC4001BP(N,F) - Toshiba PCB footprint - Dual-In-Line Packages - Dual-In-Line Packages - P-DIP14-6.4x19.25-2.54
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TC4001BP(N,F) - Toshiba  - 3D model - Dual-In-Line Packages - P-DIP14-6.4x19.25-2.54
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TC4001BP(N,F) Details

  • Manufacturer Part Number:

    TC4001BP(N,F)

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    DIP

  • Package Description:

    DIP-14

  • Pin Count:

    14

  • HTS Code:

    8542.39.00.60

  • Manufacturer:

    Toshiba America Electronic Components

  • YTEOL:

    4.5

  • Family:

    4000/14000/40000

  • JESD-30 Code:

    R-PDIP-T14

  • Length:

    19.25 mm

  • Load Capacitance (CL):

    50 pF

  • Logic IC Type:

    NOR GATE

  • Max I(ol):

    0.012 A

  • Number of Functions:

    4

  • Number of Inputs:

    2

  • Number of Terminals:

    14

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    DIP

  • Package Equivalence Code:

    DIP14,.3

  • Package Shape:

    RECTANGULAR

  • Package Style:

    IN-LINE

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Prop. Delay@Nom-Sup:

    200 ns

  • Propagation Delay (tpd):

    200 ns

  • Schmitt Trigger:

    NO

  • Seated Height-Max:

    4.45 mm

  • Supply Voltage-Max (Vsup):

    18 V

  • Supply Voltage-Min (Vsup):

    3 V

  • Supply Voltage-Nom (Vsup):

    5 V

  • Surface Mount:

    NO

  • Technology:

    CMOS

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Pitch:

    2.54 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Width:

    7.62 mm

TC4001BP(N,F) Frequently Asked Questions (FAQs)

  • The recommended operating voltage range for the TC4001BP is 4.5V to 15V.
  • To ensure proper power-on and power-off, the TC4001BP requires a slow voltage ramp-up and ramp-down (typically 10ms to 100ms) to prevent latch-up and ensure reliable operation.
  • The TC4001BP supports clock frequencies up to 100 kHz.
  • During power-down or reset, the TC4001BP's output should be in a high-impedance state to prevent back-powering the device and ensure proper operation.
  • The maximum current rating for the TC4001BP's output pins is 20mA.

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TC4001BP(N,F) Overview

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