TLP170GM(TPL,E footprint, schematic symbol and 3D model by Toshiba

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PCB Footprints

TLP170GM(TPL,E - Toshiba PCB footprint - Other - Other - TLP170GM(TPL,E-4

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Datasheet Download Datasheet
Stock & Prices Price & Stock for TLP170GM(TPL,E
Part Number TLP170GM(TPL,E
Manufacturer Toshiba
Pin Count 4
Part Category Integrated Circuit
Package Category Other
Footprint Name Other - TLP170GM(TPL,E-4
Released Date Nov 4, 2022
Last Modified Date Apr 4, 2025 2:48 PM UTC
Pinout / Pin List Click Here (Member Only)

TLP170GM(TPL,E Details

Manufacturer Part Number:
TLP170GM(TPL,E
Rohs Code:
Yes
Part Life Cycle Code:
Active
Package Description:
SOP-6/4
Country Of Origin:
Thailand
HTS Code:
8541.40.95.00
Factory Lead Time:
24 Weeks
Manufacturer:
Toshiba America Electronic Components
YTEOL:
6
Additional Feature:
UL RECOGNIZED
Configuration:
SINGLE WITH BUILT-IN DIODE
Control Current:
0.002 A
Control Voltage:
1.1 V
Forward Current-Max:
0.025 A
Input Type:
DC
Isolation Voltage-Max:
3750 V
Mounting Feature:
SURFACE MOUNT
Number of Elements:
1
On-State Current-Max:
0.11 A
On-state Resistance-Max:
50 Ω
Operating Temperature-Max:
85 °C
Operating Temperature-Min:
-40 °C
Optoelectronic Device Type:
TRANSISTOR OUTPUT SSR
Output Circuit Type:
MOSFET
Overall Height:
2.3 mm
Overall Length:
4.55 mm
Packing Method:
TR
Surface Mount:
YES

TLP170GM(TPL,E Frequently Asked Questions (FAQs)

The recommended operating voltage range for the TLP170GM is 4.5V to 5.5V.
To ensure reliability in high-temperature environments, it is recommended to follow the derating guidelines provided in the datasheet, and to consider using a heat sink or thermal management system to keep the junction temperature below 125°C.
The maximum current rating for the TLP170GM is 1.5A, but it is recommended to operate within the recommended operating conditions to ensure reliability and prevent overheating.
The TLP170GM has built-in ESD protection, but it is still recommended to follow proper ESD handling procedures when handling the device, such as using an ESD wrist strap or mat, and storing the device in an anti-static bag or container.
The recommended PCB layout for the TLP170GM involves keeping the input and output pins separate, using a ground plane to reduce noise, and minimizing the length of the input and output traces to reduce parasitic inductance.

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