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W25Q80DVBYIG - Winbond

Description: 8Mb Serial NOR Flash 104MHz WLCSP8

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PCB Footprints
W25Q80DVBYIG - Winbond PCB footprint - BGA - BGA - 8-Ball WLCSP (Package Code BY)*
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3D Models
W25Q80DVBYIG - Winbond  - 3D model - BGA - 8-Ball WLCSP (Package Code BY)*
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W25Q80DVBYIG Details

  • Manufacturer Part Number:

    W25Q80DVBYIG

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.32.00.51

  • Manufacturer:

    Winbond Electronics Corp

  • YTEOL:

    0

  • Clock Frequency-Max (fCLK):

    104 MHz

  • Data Retention Time-Min:

    20

  • Endurance:

    100000 Write/Erase Cycles

  • JESD-30 Code:

    R-XBGA-B8

  • Length:

    1.73 mm

  • Memory Density:

    8388608 bit

  • Memory IC Type:

    FLASH

  • Memory Width:

    8

  • Moisture Sensitivity Level:

    3

  • Number of Functions:

    1

  • Number of Terminals:

    8

  • Number of Words:

    1048576 words

  • Number of Words Code:

    1000000

  • Operating Mode:

    SYNCHRONOUS

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    1MX8

  • Output Characteristics:

    3-STATE

  • Package Body Material:

    UNSPECIFIED

  • Package Code:

    VFBGA

  • Package Equivalence Code:

    BGA8,2X4,16

  • Package Shape:

    RECTANGULAR

  • Package Style:

    GRID ARRAY, VERY THIN PROFILE, FINE PITCH

  • Parallel/Serial:

    SERIAL

  • Programming Voltage:

    3 V

  • Seated Height-Max:

    0.476 mm

  • Serial Bus Type:

    QSPI

  • Standby Current-Max:

    0.00006 A

  • Supply Current-Max:

    0.025 mA

  • Supply Voltage-Max (Vsup):

    3.6 V

  • Supply Voltage-Min (Vsup):

    2.7 V

  • Supply Voltage-Nom (Vsup):

    3 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.4 mm

  • Terminal Position:

    BOTTOM

  • Type:

    NOR TYPE

  • Width:

    1.432 mm

  • Write Protection:

    HARDWARE/SOFTWARE

W25Q80DVBYIG Frequently Asked Questions (FAQs)

  • The W25Q80DVBYIG has a minimum of 100,000 erase cycles per sector, and a total of 20,000,000 erase cycles for the entire device.
  • The HOLD# pin should be pulled high during power-up and power-down to prevent any unwanted commands from being executed. It's recommended to connect a pull-up resistor to VCC and a capacitor to GND to ensure a clean signal.
  • The W25Q80DVBYIG supports clock frequencies up to 104 MHz, but it's recommended to use a clock frequency of 50 MHz or lower to ensure reliable operation and minimize power consumption.
  • The WP# pin should be pulled high during normal operation to allow write and erase operations. If the WP# pin is pulled low, the device will be in a protected state, and write and erase operations will be disabled.
  • The Deep Power-Down (DP) mode is a low-power state that reduces the device's power consumption to a minimum. It's useful for battery-powered devices or applications where power consumption needs to be minimized.

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