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WM8524CGEDT - Cirrus Logic

Description: Audio D/A Converter ICs Stereo DAC, 2Vrms

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WM8524CGEDT - Cirrus Logic - PCB symbol
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PCB Footprints
WM8524CGEDT - Cirrus Logic PCB footprint - Small Outline Packages - Small Outline Packages - 16L TSSOP-
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WM8524CGEDT - Cirrus Logic - 3D model - Small Outline Packages - 16L TSSOP-
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WM8524CGEDT Details

  • Manufacturer Part Number:

    WM8524CGEDT

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    5 X 4.40 MM, 1 MM HEIGHT, LEAD FREE, MO-153AB, TSSOP-16

  • HTS Code:

    8542.39.00.40

  • Factory Lead Time:

    21 Weeks

  • Manufacturer:

    Cirrus Logic

  • YTEOL:

    7.98

  • Converter Type:

    D/A CONVERTER

  • Input Bit Code:

    BINARY

  • Input Format:

    SERIAL

  • JESD-30 Code:

    R-PDSO-G16

  • Length:

    5 mm

  • Number of Bits:

    24

  • Number of Functions:

    1

  • Number of Terminals:

    16

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TSSOP

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

  • Seated Height-Max:

    1.2 mm

  • Supply Voltage-Nom:

    3.3 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    DUAL

  • Width:

    4.4 mm

WM8524CGEDT Frequently Asked Questions (FAQs)

  • The recommended power-up sequence is to apply VDD first, followed by VDDIO, and then the clock signal. This ensures proper initialization of the device.
  • To configure the WM8524CGEDT for master clock mode, set the MCLK pin as an output by setting the MCLKOE bit in the Clock Control Register (0x04). Then, set the desired clock frequency using the MCLKDIV registers (0x05-0x06).
  • The digital mute pin (DMUTE) is used to mute the digital audio output. When DMUTE is high, the digital audio output is muted, and when it is low, the output is enabled.
  • To implement a 24-bit audio interface, set the I2S format to 24-bit using the I2S Control Register (0x10). Then, configure the data alignment and justification using the I2S Data Alignment Register (0x11) and the I2S Justification Register (0x12).
  • The WM8524CGEDT supports clock frequencies up to 50 MHz.

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WM8524CGEDT Overview

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