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1.25-L5
JST Manufacturing
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1 | Ring Terminal, 1.65mm2 | 1.25-L5 |
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IDT72T36125L5BBI
Renesas Electronics
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1 | IDT IDT72T36125L5BBI, FIFO Memory, Dual, 256K x 36 bit, Uni-Directional 10ns 200MHz, 2.375 → 2.625 V, 240-Pin BGA | BGA | IDT72T36125L5BBI |
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72T36125L5BBG
Renesas Electronics
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1 | The 72T36125 is a 256K x 36 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode. | BGA | 72T36125L5BBG |
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72T18125L5BBGI
Renesas Electronics
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1 | The 72T18125 is a 512K x 18 / 1M x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode. | BGA | 72T18125L5BBGI |
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72T36125L5BBGI
Renesas Electronics
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1 | The 72T36125 is a 256K x 36 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode. | BGA | 72T36125L5BBGI |
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IDT72T18125L5BBI
Renesas Electronics
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1 | IDT IDT72T18125L5BBI, FIFO Memory | BGA | IDT72T18125L5BBI |
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72T18125L5BBI
Renesas Electronics
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1 | The 72T18125 is a 512K x 18 / 1M x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode. | BGA | 72T18125L5BBI |
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72125L50SO8
Renesas Electronics
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1 | The 72125 is a 1K x 16 dedicated, parallel-to-serial FIFOs. The ability to buffer wide word widths (x16) make this FIFO ideal for laser printers, FAX machines, local area networks (LANS), video storage and disk/tape controller applications. Expansion in width and depth can be achieved using multiple chips. IDT's unique serial expansion logic makes this possible using a minimum of pins. | Small Outline Packages | 72125L50SO8 |
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72T18125L5BB
Renesas Electronics
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1 | The 72T18125 is a 512K x 18 / 1M x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode. | BGA | 72T18125L5BB |
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72125L50SO
Renesas Electronics
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1 | The 72125 is a 1K x 16 dedicated, parallel-to-serial FIFOs. The ability to buffer wide word widths (x16) make this FIFO ideal for laser printers, FAX machines, local area networks (LANS), video storage and disk/tape controller applications. Expansion in width and depth can be achieved using multiple chips. IDT's unique serial expansion logic makes this possible using a minimum of pins. | Small Outline Packages | 72125L50SO |
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70125L55J8
Renesas Electronics
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1 | The 70125 is a high-speed 2K x 9 Dual-Port Static RAM designed to be used as a "SLAVE" Dual-Port together with the 70121 "MASTER" in 18-bit-or-more word width systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power-down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low standby power mode. | Plastic Leaded Chip Carrier | 70125L55J8 |
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72T36125L5BB
Renesas Electronics
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1 | The 72T36125 is a 256K x 36 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode. | BGA | 72T36125L5BB |
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70125L55J
Renesas Electronics
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1 | The 70125 is a high-speed 2K x 9 Dual-Port Static RAM designed to be used as a "SLAVE" Dual-Port together with the 70121 "MASTER" in 18-bit-or-more word width systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power-down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low standby power mode. | Plastic Leaded Chip Carrier | 70125L55J |
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72125L50TP
Renesas Electronics
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1 | The 72125 is a 1K x 16 dedicated, parallel-to-serial FIFOs. The ability to buffer wide word widths (x16) make this FIFO ideal for laser printers, FAX machines, local area networks (LANS), video storage and disk/tape controller applications. Expansion in width and depth can be achieved using multiple chips. IDT's unique serial expansion logic makes this possible using a minimum of pins. | Dual-In-Line Packages | 72125L50TP |
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72T36125L5BBI
Renesas Electronics
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1 | The 72T36125 is a 256K x 36 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode. | BGA | 72T36125L5BBI |
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125L50-O3M-02-HA
Cooper Industries
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1 | 125L50-O3M-02-HA | 125L50-O3M-02-HA |
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125L50-B6M-02-KB
Cooper Industries
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1 | 125L50-B6M-02-KB | 125L50-B6M-02-KB |
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125L50-O3M-02-WA
Cooper Industries
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1 | 125L50-O3M-02-WA | 125L50-O3M-02-WA |
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125L50-A2M-02-HB
Cooper Industries
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1 | 125L50-A2M-02-HB | 125L50-A2M-02-HB |
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125L50-C2M-02-WA
Cooper Industries
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1 | 125L50-C2M-02-WA | 125L50-C2M-02-WA |
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125L50-B6M-01-WA
Cooper Industries
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1 | 125L50-B6M-01-WA | 125L50-B6M-01-WA |
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125L50-B0M-02-WA
Cooper Industries
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1 | 125L50-B0M-02-WA | 125L50-B0M-02-WA |
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125L50-O6M-02-WA
Cooper Industries
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1 | 125L50-O6M-02-WA | 125L50-O6M-02-WA |
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125L50-O3M-01-KB
Cooper Industries
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1 | 125L50-O3M-01-KB | 125L50-O3M-01-KB |
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125L50-B1M-01-WA
Cooper Industries
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1 | 125L50-B1M-01-WA | 125L50-B1M-01-WA |
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