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8V34S208NLGI8
Renesas Electronics
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1 | The 8V34S208 is a differential 1:8 LVDS fanout buffer with a 2:1 input multiplexer. The device accepts DC to 250MHz clock and data signals and is designed for 1Hz clock /1PPS, 2kHz and 8kHz signal distribution. Controlled by the input mode selection pin, the differential input stages accept both rectangular or sinusoidal signals. The 8V34S208 also provides level translated LVCMOS/LVTTL outputs which are copies of the individual differential inputs CLKA and CLKB. The propagation delay of the device is very l | Quad Flat No-Lead | 8V34S208NLGI8 |
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8V34S204NLGI8
Renesas Electronics
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1 | The 8V34S204 is a differential 1:4 LVDS fanout buffer with a 2:1 input multiplexer. The device accepts DC to 250MHz clock and data signals and is designed for 1Hz clock/1PPS, 2kHz and 8kHz signal distribution. Controlled by the input modes election pin, the differential input stages accept both rectangular or sinusoidal signals. The 8V34S204 also provides level translated LVCMOS/LVTTL outputs which are copies of the individual differential inputs CLKA and CLKB. The propagation delay of the device is very lo | Quad Flat No-Lead | 8V34S204NLGI8 |
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8V34S204NLGI
Renesas Electronics
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1 | The 8V34S204 is a differential 1:4 LVDS fanout buffer with a 2:1 input multiplexer. The device accepts DC to 250MHz clock and data signals and is designed for 1Hz clock/1PPS, 2kHz and 8kHz signal distribution. Controlled by the input modes election pin, the differential input stages accept both rectangular or sinusoidal signals. The 8V34S204 also provides level translated LVCMOS/LVTTL outputs which are copies of the individual differential inputs CLKA and CLKB. The propagation delay of the device is very lo | Quad Flat No-Lead | 8V34S204NLGI |
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8V34S208NLGI
Renesas Electronics
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1 | The 8V34S208 is a differential 1:8 LVDS fanout buffer with a 2:1 input multiplexer. The device accepts DC to 250MHz clock and data signals and is designed for 1Hz clock /1PPS, 2kHz and 8kHz signal distribution. Controlled by the input mode selection pin, the differential input stages accept both rectangular or sinusoidal signals. The 8V34S208 also provides level translated LVCMOS/LVTTL outputs which are copies of the individual differential inputs CLKA and CLKB. The propagation delay of the device is very l | Quad Flat No-Lead | 8V34S208NLGI |
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8V34S204NLGI
Integrated Device Technology Inc
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1 | Low Skew Clock Driver, 8V Series, 8 True Output(s), 0 Inverted Output(s), QCC24 | 8V34S204NLGI |
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8V34S208NLGI
Integrated Device Technology Inc
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1 | Low Skew Clock Driver, 8V Series, 16 True Output(s), 0 Inverted Output(s), QCC32 | 8V34S208NLGI |
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8V34S204NLGI8
Integrated Device Technology Inc
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1 | Low Skew Clock Driver, 8V Series, 8 True Output(s), 0 Inverted Output(s), QCC24 | 8V34S204NLGI8 |
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Build or Request | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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8V34S208NLGI8
Integrated Device Technology Inc
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1 | Low Skew Clock Driver, 8V Series, 16 True Output(s), 0 Inverted Output(s), QCC32 | 8V34S208NLGI8 |
0
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Build or Request | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||