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Image Part Number D.S Description Package Category Prices / Stock Model Action
Image Part Number D.S Description Package Category Prices / Stock Model Action
Part Image Part Image 1 ON Semiconductor MC74VHC1G04DTT1G CMOS Inverter, CMOS, 2 → 5.5 V, 5-Pin TSOP SOT23 (5-Pin) MC74VHC1G04DTT1G 1 Download Model
Part Image Part Image 1 Buffer/Line Driver 1-CH Non-Inverting 3-ST CMOS 5-Pin SC-70 T/R - Tape and Reel SOT23 (5-Pin) MC74VHC1GT125DF1G 1 Download Model
Part Image Part Image 1 ON Semiconductor MC74VHC1G07DTT1G, Buffer, Open Drain, Non-Inverting, 2 → 5.5 V, 5-Pin TSOP SOT23 (5-Pin) MC74VHC1G07DTT1G 1 Download Model
Part Image Part Image 1 Pin and Function Compatible with Other Standard Logic Families; Balanced Propagation Delays; Power Down Protection Provided on Inputs and Outputs; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; High Speed: tPD = 3.5ns (Typ) at V CC = 5V; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @Load; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available; Designed for 2.0 V to 5.5 V VCC Operation SOT23 (5-Pin) MC74VHC1GT126DBVT1G 1 Download Model
Part Image Part Image 1 Buffer, Non-Inverting 1 Element 1 Bit per Element 3-State Output SOT-953 Other MC74VHC1G126P5T5G 1 Download Model
Part Image Part Image 1 Pin and Function Compatible with Other Standard Logic Families; Balanced Propagation Delays; High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Power Down Protection Provided on Inputs; Designed for 2.0 V to 5.5 V VCC Operation; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available SOT23 (5-Pin) MC74VHC1G00DFT1G-Q 1 Download Model
Part Image Part Image 1 CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @ Load; High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Pin and Function Compatible with Other Standard Logic Families; Balanced Propagation Delays; Power Down Protection Provided on Inputs and Outputs; Pb-Free Packages are Available; Designed for 1.65 V to 5.5 V Vcc Operation SOT23 (5-Pin) MC74VHC1GT14DFT2G 1 Download Model
Part Image Part Image 1 High Noise Immunity: VNIH = VNIL = 28% VCC; Chip Complexity: 128 FETs or 32 Equivalent Gates; Low Power Dissipation: ICC = 2µA (Max) at TA = 25 C; Power Down Protection Provided on Inputs; Pin and Function Compatible with Other Standard Logic Families; High Speed: fmax = 170MHz (Typ) at VCC = 5V; Designed for 2V to 5.5V Operating Range; Latchup Performance Exceeds 300mA; Balanced Propagation Delays; Low Noise: VOLP = 0.8V (Max); ESD Performance: HBM > 2000V; Machine Model > 200V; Pb-Free Packages are Availa Small Outline Packages MC74VHC74DTR2G 1 Download Model
Part Image Part Image 1 Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Power Down Protection Provided on Inputs; High Speed: tPD = 3.6ns (Typ) at VCC = 5V; Pin and Function Compatible with Other Standard Logic Families; Balanced Propagation Delays; Chip Complexity: FETs = <100; Pb-Free Packages are Available; Designed for 2.0 V to 5.5 V Vcc Operation Wide Operating Vcc Range SOT23 (5-Pin) MC74VHC1G132DBVT1G 1 Download Model
Part Image Part Image 1 Wide Operating Vcc Range; High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC= 1µA (Max) at TA = 25°C; TTL-Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V; CMOS-Compatible Outputs: VOH > 0.8 VCC ; VOL < 0.1 VCC @Load; Power Down Protection Provided on Inputs and Outputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity:FETs = ≤ 100; Pb-Free Packages are Available SOT23 (5-Pin) MC74VHC1GT125DFT1G 1 Download Model
Part Image Part Image 1 High Speed: tPD = 3.1ns (Typ) at VCC = 5V; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @Load; Power Down Protection Provided on Inputs and Outputs; Pin and Function Compatible with Other Standard Logic Families; Low Power Dissipation: ICC = 2m A (Max) at TA = 25°C; Balanced Propagation Delays; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Pb-Free Packages are Available; Designed for 2.0 V to 5.5 V VCC Operation SOT23 (5-Pin) MC74VHC1GT00DFT2G-Q 1 Download Model
Part Image Part Image 1 CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @ Load; High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Pin and Function Compatible with Other Standard Logic Families; Balanced Propagation Delays; Power Down Protection Provided on Inputs and Outputs; Pb-Free Packages are Available; Designed for 1.65 V to 5.5 V Vcc Operation SOT23 (5-Pin) MC74VHC1GT14DFT1G-Q 1 Download Model
Part Image Part Image 1 Wide Operating Vcc Range; High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Power Down Protection Provided on Inputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available SOT23 (5-Pin) MC74VHC1G08DFT2G 1 Download Model
Part Image Part Image 1 Wide Operating Vcc Range; High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Power Down Protection Provided on Inputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available SOT23 (5-Pin) MC74VHC1G08DFT1G 1 Download Model
Part Image Part Image 1 Latchup Performance Exceeds 300mA; Power Down Protection Provided on Inputs; High Speed: tPD = 3.8ns (Typ) at VCC = 5V; Designed for 2V to 5.5V Operating Range; ESD Performance: HBM > 2000V; Machine Model > 200V; Low Noise: VOLP = 0.8V (Max); Low Power Dissipation: ICC = 4mA (Max) at TA = 25°C; Pin and Function Compatible with Other Standard Logic Families; Balanced Propagation Delays; Chip Complexity: 72 FETs or 18 Equivalent Gates; High Noise Immunity: VNIH = VNIL = 28% VCC; These devices are available in Small Outline Packages MC74VHC125DTR2G 1 Download Model
Part Image Part Image 1 Balanced Propagation Delays; Power Down Protection Provided on Inputs and Outputs; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Latchup Performance Exceeds 300mA; Designed for 4.5V to 5.5V Operating Range; Chip Complexity: 196 FETs or 49 Equivalent Gates; Pin and Function Compatible with Other Standard Logic Families; High Speed: tPD = 7.7ns (Typ) at VCC = 5V; Low Noise: VOLP = 1.6V (Max); ESD Performance: HBM > 2000V; Machine Model > 200V; Low Power Dissipation: ICC = 4µA (Max) at TA = 25 C; Pb-Free Pack Small Outline Packages MC74VHCT373ADTR2G 1 Download Model
Part Image Part Image 1 High Speed: tPD = 7.7ns (Typ) at VCC = 5V; Low Noise: VOLP = 1.6V (Max); Low Power Dissipation: ICC = 4µA (Max) at TA = 25 C; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Power Down Protection Provided on Inputs and Outputs; Balanced Propagation Delays; Chip Complexity: 234 FETs or 58.5 Equivalent Gates; Pin and Function Compatible with Other Standard Logic Families; ESD Performance: HBM > 2000V; Machine Model > 200V; Latchup Performance Exceeds 300mA; Designed for 4.5V to 5.5V Operating Range; Pb-Free Pa Small Outline Packages MC74VHCT573ADWR2G 1 Download Model
Part Image Part Image 1 Pin and Function Compatible with Other Standard Logic Families; Latchup Performance Exceeds 300mA; Designed for 2V to 5.5V Operating Range; Low Noise: VOLP = 0.8 V (Max); ESD Performance: HBM > 2000V; Machine Model > 200V; Chip Complexity: 122 FETs or 30.5 Equivalent Gates; Balanced Propagation Delays; High Speed: tPD = 5.7ns (Typ) at VCC = 5V; Power Down Protection Provided on Inputs; High Noise Immunity: VNIH = VNIL = 28% VCC; Low Power Dissipation: ICC = 4mA (Max) at TA = 25°C; These devices are availabl Small Outline Packages MC74VHC138DTR2G 1 Download Model
Part Image Part Image 1 Obsolete - Quad Analog Multiplexer/Demultiplexer (Mux/Demux) Small Outline Packages MC74VHC4316DG 1 Download Model
Part Image Part Image 1 Wide Operating Vcc Range; High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Power Down Protection Provided on Inputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available SOT23 (5-Pin) MC74VHC1G08DFT1G-Q 1 Download Model
Part Image Part Image 1 Low Crosstalk Between Switches; Analog Power Supply Range (VCC - VEE) = 2.0 to 12.0 V; Chip Complexity:VHC4051 - 184 FETs or 46 Equivalent Gates; VHC4052 - 168 FETs or 42 Equivalent Gates; VHC4053 - 156 FETs or 39 Equivalent Gates; Diode Protection on All Inputs/Outputs; Improved Linearity and Lower on Resistance Than Metal-Gate Counterparts; In Compliance With the Requirements of JEDEC Standard No. 7A; Fast Switching and Propagation Speeds; Digital (Control) Power Supply Range (VCC - GND) = 2.0 to 6.0 V; L Small Outline Packages MC74VHC4052DTR2G 1 Download Model
Part Image Part Image 1 Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Low Noise: VOLP = 0.8V (Max); Power Down Protection Provided on Inputs and Outputs; Chip Complexity: 48 FETs or 12 Equivalent Gates; Low Power Dissipation: ICC = 2µA (Max) at TA = 25 C; Designed for 3.0V to 5.5V Operating Range; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; High Speed: tPD = 5.0ns (Typ) at VCC = 5V; These devices are available in Pb-free package(s). Specifications herein apply to both standard and Small Outline Packages MC74VHCT00ADR2G 1 Download Model
Part Image Part Image 1 High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Balanced Propagation Delays; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available; Designed for 2.0 V to 5.5 V Vcc Operation; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Power Down Protection Provided on Inputs; Pin and Function Compatible with Other Standard Logic Families Other MC74VHC1G02DFT2G-Q 1 Download Model
Part Image Part Image 1 TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Low Noise: VOLP = 0.8V (Max); Designed for 2V to 5.5V Operating Range; High Speed: tPD = 3.8ns (Typ) at VCC = 5V; Pin and Function Compatible with Other Standard Logic Families; Power Down Protection Provided on Inputs; Balanced Propagation Delays; Low Power Dissipation: ICC = 4mA (Max) at TA = 25°C; Chip Complexity: 72 FETs or 18 Equivalent Gates; Latchup Performance Exceeds 300mA; ESD Performance: HBM > 2000V; Machine Model > 200V; Pb-Free Packages are Availa Small Outline Packages MC74VHCT125ADTRG 1 Download Model
Part Image Part Image 1  High Speed: tPD = 3.8 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 2.0 A (Max) at TA = 25C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2.0 V to 5.5 V Operating Range Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 100 mA ESD Performance: Human Body Model > 2000 V Chip Complexity: 48 FETs or 12 Equivalent Gates −Q Small Outline Packages MC74VHCT32ADTR2G-Q 1 Download Model
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