Description:The 87339I-11 is a low skew, high performance Differential-to-3.3V LVPECL Clock Generator/Divider. The 87339I-11 has one differential clock input pair. The CLK, nCLK pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 87339I-11 ideal for clock distribution applications demanding well define
Renesas provides a recommended PCB layout guide in their application note (APN) document, which includes thermal design considerations, such as copper pour, thermal vias, and component placement.
Renesas recommends following the thermal design guidelines, using a heat sink if necessary, and ensuring proper airflow around the device. Additionally, the device's thermal shutdown feature can be enabled to prevent damage from overheating.
The datasheet provides general guidelines for capacitor selection, but Renesas recommends using X5R or X7R ceramic capacitors with a voltage rating of at least 1.5 times the input voltage. The specific capacitance value and ESR requirements can be found in the application note or by consulting with Renesas support.
Renesas recommends checking the EN pin's voltage level, ensuring it is within the specified range, and verifying that the pin is not being driven by multiple sources. Additionally, checking the device's power-good signal (PG) can help identify issues with the EN pin.
Renesas provides a soldering and rework guide in their application note, which includes recommended soldering temperatures, times, and techniques. It's essential to follow these guidelines to prevent damage to the device.
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87339AGI-11LF Overview
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