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EN23F2QI - Intel

Description: Non-Isolated PoL Module DC DC Converter 1 Output 0.75 ~ 3.3V 15A 4.5V - 13.2V Input

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EN23F2QI - Intel  - 3D model
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EN23F2QI Details

  • Manufacturer Part Number:

    EN23F2QI

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    QFN-92

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Manufacturer:

    Intel Corporation

  • YTEOL:

    0

  • Additional Feature:

    OUTPUT VOLTAGE RANGE FROM 0.75 V TO 3.3 V

  • Analog IC - Other Type:

    SWITCHING REGULATOR

  • Control Mode:

    VOLTAGE-MODE

  • Control Technique:

    PULSE WIDTH MODULATION

  • Input Voltage-Max:

    13.2 V

  • Input Voltage-Min:

    4.5 V

  • Input Voltage-Nom:

    12 V

  • JESD-30 Code:

    R-XQCC-N92

  • Length:

    13 mm

  • Number of Functions:

    1

  • Number of Terminals:

    92

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    UNSPECIFIED

  • Package Code:

    HQCCN

  • Package Equivalence Code:

    LCC92,.47X.51,20

  • Package Shape:

    RECTANGULAR

  • Package Style:

    CHIP CARRIER, HEAT SINK/SLUG

  • Seated Height-Max:

    3.05 mm

  • Surface Mount:

    YES

  • Switcher Configuration:

    BUCK

  • Switching Frequency-Max:

    1000 kHz

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Width:

    12 mm

EN23F2QI Frequently Asked Questions (FAQs)

  • Intel recommends a 2-layer or 4-layer PCB with a thermal pad connected to a solid ground plane to ensure efficient heat dissipation. A minimum of 2 oz copper thickness is recommended for the thermal pad.
  • Intel recommends following the thermal design guidelines, using a heat sink with a thermal interface material, and ensuring good airflow around the device. Additionally, consider using thermal monitoring and shutdown mechanisms to prevent overheating.
  • Intel recommends a power sequencing scheme that ensures the core voltage (VCC) is applied before the input/output voltage (VIO). The voltage ramp-up/ramp-down rate should be limited to 10 mV/μs to prevent damage to the device.
  • Intel recommends following good PCB design practices, such as using a solid ground plane, minimizing signal trace lengths, and using EMI filters or shielding to reduce radiation. Additionally, ensure that the device is properly decoupled and that the power supply is EMI-compliant.
  • Intel recommends using a clock signal with a maximum jitter of 100 ps and a clock frequency tolerance of ±100 ppm. The clock signal should also be properly terminated and filtered to prevent signal degradation.

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EN23F2QI Overview

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