NB3N51044DTR2G - onsemi
Description: Four Low Skew HCSL or LVDS Outputs; Output frequency selection of 100 MHz or 125 MHz ; Individual OE Tri-states Output; Master Reset and BYPASS modes; PCIe Gen 1, Gen 2, Gen 3, Gen 4 jitter Compliant; Typical Phase Jitter @ 125 MHz (integrated 1.875 MHz to 20 MHz): 0.2 ps; Typical Cycle-cycle Jitter @ 100 MHz (10k cycles): 20 ps; Operating Supply Voltage Range 3.3 V ± 5%; Industrial Temperature Range-40°C to +85°C; Uses 25 MHz Fundamental Crystal or Reference Clock Input
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