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NVMFS5C682NLWFAFT1G - onsemi

Description: Industry Standard Small Footprint 5x6mm Package; Low QG and Gate Capacitance; Low RDS(on); NVMFS5C682NLWF − Wettable Flank Option; AEC−Q101 Qualified and PPAP Capable; RoHS Compliant

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NVMFS5C682NLWFAFT1G Details

  • Manufacturer Part Number:

    NVMFS5C682NLWFAFT1G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    DFNW5 4.90x5.90x1.00, 1.27P

  • Package Description:

    SO-8FL, DFN5, 6 PIN

  • Manufacturer Package Code:

    507BA

  • Country Of Origin:

    Malaysia

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    15 Weeks

  • Date Of Intro:

    2017-02-23

  • Manufacturer:

    onsemi

  • YTEOL:

    5

  • Avalanche Energy Rating (Eas):

    43 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    60 V

  • Drain Current-Max (ID):

    25 A

  • Drain-source On Resistance-Max:

    0.0315 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PDSO-F5

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    5

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    28 W

  • Pulsed Drain Current-Max (IDM):

    130 A

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Element Material:

    SILICON

NVMFS5C682NLWFAFT1G Frequently Asked Questions (FAQs)

  • The recommended operating temperature range for NVMFS5C682NLWFAFT1G is -40°C to 125°C.
  • To ensure data integrity and prevent data corruption during power cycling, it is recommended to use a voltage supervisor or a power-on reset circuit to ensure that the device is fully powered up before accessing the memory.
  • The NVMFS5C682NLWFAFT1G supports up to 100,000 erase cycles.
  • The NVMFS5C682NLWFAFT1G uses a page-based architecture, where each page is 528 bytes. The device has 2048 pages per block, and 128 blocks per device. The user needs to manage page and block allocation, wear leveling, and bad block management to ensure optimal performance and reliability.
  • The typical programming time for NVMFS5C682NLWFAFT1G is 2-3 ms per page.

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NVMFS5C682NLWFAFT1G Overview

Use the download button to access the NVMFS5C682NLWFAFT1G 3D model. You can still request or build the schematic symbol and PCB footprint by using the respective build or request forms on this page.
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Power Field-Effect Transistor, 25A I(D), 60V, 0.0315ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET

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Power Field-Effect Transistor, 25A I(D), 60V, 0.0315ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET

Part Image NVMFS5C682NLWFT1G onsemi

Power Field-Effect Transistor, 25A I(D), 60V, 0.0315ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET

For a full list of alternate parts for NVMFS5C682NLWFAFT1G, check out Findchips.com