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XC7K325T-1FB676I - AMD

Description: FPGA - Field Programmable Gate Array XC7K325T-1FB676I

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PCB Footprints
XC7K325T-1FB676I - AMD PCB footprint - BGA - BGA - FB676, FBG676, and FBV676 (Artix-7 FPGAs) Flip-Chip Lidless BGA (1.0 mm Pitch
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3D Models
XC7K325T-1FB676I - AMD  - 3D model - BGA - FB676, FBG676, and FBV676 (Artix-7 FPGAs) Flip-Chip Lidless BGA (1.0 mm Pitch
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XC7K325T-1FB676I Details

  • Manufacturer Part Number:

    XC7K325T-1FB676I

  • Part Life Cycle Code:

    Active

  • Package Description:

    BGA-676

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    14

  • Clock Frequency-Max:

    1818 MHz

  • Combinatorial Delay of a CLB-Max:

    0.3 ns

  • JESD-30 Code:

    S-PBGA-B676

  • JESD-609 Code:

    e0

  • Length:

    27 mm

  • Moisture Sensitivity Level:

    4

  • Number of Inputs:

    400

  • Number of Logic Cells:

    326080

  • Number of Outputs:

    400

  • Number of Terminals:

    676

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    25475 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA676,26X26,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    225

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.54 mm

  • Supply Voltage-Max:

    1.03 V

  • Supply Voltage-Min:

    0.97 V

  • Supply Voltage-Nom:

    1 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 28 nm

  • Terminal Finish:

    Tin/Lead (Sn63Pb37)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    27 mm

XC7K325T-1FB676I Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC7K325T-1FB676I is 350 MHz, but it depends on the specific design and implementation.
  • Xilinx provides a DDR3 memory interface IP core that can be used to implement a DDR3 memory interface on the XC7K325T-1FB676I. The IP core is available in the Vivado Design Suite and can be customized to meet specific design requirements.
  • The power consumption of the XC7K325T-1FB676I depends on the specific design and implementation. However, Xilinx provides power estimation tools and documentation to help estimate power consumption. Typically, the power consumption of the XC7K325T-1FB676I is around 10-20 watts.
  • Yes, the XC7K325T-1FB676I is suitable for high-reliability applications. Xilinx provides a range of features and tools to support high-reliability designs, including built-in error correction, redundant logic, and fault-tolerant design flows.
  • Xilinx provides a range of debugging and testing tools, including the Vivado Design Suite, ChipScope Pro, and the Xilinx Serial I/O Toolkit. These tools allow designers to debug and test their designs at various stages of development.

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XC7K325T-1FB676I Overview

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Image Part Number Model
Part Image XC7K325T-1FBG676C AMD

Field Programmable Gate Array, 25475 CLBs, 1098MHz, 326080-Cell, CMOS, PBGA676

Part Image XC7K325T-1FB676C AMD Xilinx

Field Programmable Gate Array, 1818MHz, 326080-Cell, CMOS, PBGA676

Part Image XC7K325T-1FB676I AMD Xilinx

Field Programmable Gate Array, 1818MHz, 326080-Cell, CMOS, PBGA676

Part Image XC7K325T-1FBV676C AMD Xilinx

Field Programmable Gate Array, 25475 CLBs, PBGA676

Part Image XC7K325T-1FBV676I AMD Xilinx

Field Programmable Gate Array, 25475 CLBs, PBGA676

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