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XC7K325T-1FBG900C - AMD

Description: FPGA - Field Programmable Gate Array XC7K325T-1FBG900C

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XC7K325T-1FBG900C - AMD PCB footprint - BGA - BGA - FBG900 pinout
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XC7K325T-1FBG900C - AMD  - 3D model - BGA - FBG900 pinout
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XC7K325T-1FBG900C Details

  • Manufacturer Part Number:

    XC7K325T-1FBG900C

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    BGA-900

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    14

  • Clock Frequency-Max:

    1098 MHz

  • Combinatorial Delay of a CLB-Max:

    0.3 ns

  • JESD-30 Code:

    S-PBGA-B900

  • JESD-609 Code:

    e1

  • Length:

    31 mm

  • Moisture Sensitivity Level:

    4

  • Number of CLBs:

    25475

  • Number of Inputs:

    500

  • Number of Logic Cells:

    326080

  • Number of Outputs:

    500

  • Number of Terminals:

    900

  • Operating Temperature-Max:

    85 °C

  • Organization:

    25475 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA900,30X30,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    245

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.54 mm

  • Supply Voltage-Max:

    1.03 V

  • Supply Voltage-Min:

    0.97 V

  • Supply Voltage-Nom:

    1 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 28 nm

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    31 mm

XC7K325T-1FBG900C Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC7K325T-1FBG900C is 500 MHz, but it depends on the specific application, clock domain, and design implementation.
  • To optimize power consumption, use the Xilinx Power Estimator (XPE) tool, enable power gating, reduce clock frequency, use low-power modes, and optimize the design for low power consumption.
  • The -1 speed grade has a higher maximum clock frequency (500 MHz) compared to the -2 speed grade (400 MHz), but the -2 speed grade has lower power consumption.
  • Yes, the XC7K325T-1FBG900C is suitable for high-reliability applications, such as aerospace, defense, and industrial control systems, due to its high-performance, low-power, and ruggedized design.
  • Use the Xilinx MIG (Memory Interface Generator) tool to generate a DDR3 memory interface IP core, and follow the Xilinx guidelines for implementing DDR3 memory interfaces on the XC7K325T-1FBG900C.

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XC7K325T-1FBG900C Overview

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Image Part Number Model
Part Image XC7K325T-1FBG900C AMD Xilinx

Field Programmable Gate Array, 25475 CLBs, 1098MHz, 326080-Cell, CMOS, PBGA900

Part Image XC7K325T-1FB900I AMD Xilinx

Field Programmable Gate Array, 25475 CLBs, PBGA900

Part Image XC7K325T-1FBG900E AMD Xilinx

Field Programmable Gate Array, PBGA900

Part Image XC7K325T-1FB900C AMD Xilinx

Field Programmable Gate Array, 1818MHz, 326080-Cell, CMOS, PBGA900

Part Image XC7K325T-1FBV900I AMD Xilinx

Field Programmable Gate Array, 25475 CLBs, PBGA900

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