Part Image

71V424L12PHG - Renesas Electronics

Description: The 71V424 3.3V CMOS SRAM is organized as 512K x 8. All bidirectional inputs and outputs of the 71V424 are TTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.

Download 71V424L12PHG Model
Schematic
symbols
Schematic symbol is unavailable for download
PCB
footprints
PCB footprint is unavailable for download
3D
models
3D model is unavailable for download
Layers
    Zoom
    Zoom Full
    Middle click on footprint to measure