Part Image

CD4099BDMSR - Renesas Electronics

Description: The CD4099BMS 8-bit addressable latch is a serial input, parallel output storage register that can perform a variety of functions. Data are inputted to a particular bit in the latch when that bit is addressed (by means of inputs A0, A1, A2) and when WRITE DISABLE is at a low level. When WRITE DISABLE is high, data entry is inhibited; however, all 8 outputs can be continuously read independent of WRITE DISABLE and address inputs. A master RESET input is available, which resets all bits to a logic 0 level whe

Download CD4099BDMSR Model
Schematic
symbols
Schematic symbol is unavailable for download
PCB
footprints
PCB footprint is unavailable for download
3D
models
3D model is unavailable for download
Layers
Zoom
Zoom Full Zoom Full
Drag mouse to rotate
Mouse wheel to zoom