HMC7044BLP10BETR - Analog Devices

Description: Ultra-low rms jitter: 44 fs typical (12 kHz to 20 MHz) at 2457.6 MHz ► Noise floor: −156 dBc/Hz at 2457.6 MHz ► Low phase noise: −141.7 dBc/Hz at 800 kHz, 983.04 MHz output ► Up to 14 LVDS, LVPECL, or CML type device clocks (DCLKs) from PLL2