MPC9772AE - Renesas Electronics

Description: The MPC9772 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9772 requires the connection of the PLL feedback output QFB to feedback input FB_IN to close the PLL feedback path. The reference clock frequency and the divider for the feedback path determine the VCO frequency. Both must be selected to match the VCO frequency range. The MPC9772 features an extensive level of frequency programmability between the 12 outputs as well as the output to in