PIC16LF18324-I/SL - Microchip

Description: C Compiler Optimized RISC Architecture • Only 48 Instructions • Operating Speed: - DC – 32 MHz clock input - 125 ns minimum instruction cycle • Interrupt Capability • 16-Level Deep Hardware Stack • Up to Four 8-bit Timers • Up to Three 16-bit Timers • Low-Current Power-on Reset (POR) • Power-up Timer (PWRT) • Brown-out Reset (BOR) • Low-Power BOR (LPBOR) Option • Extended Watchdog Timer (WDT) with Dedicated On-Chip Oscillator for Reliable Op