R5F117A8GSP#70 - Renesas Electronics
Description: Ultra-low power consumption technology • VDD = 1.6 V to 3.6 V • HALT mode • STOP mode • SNOOZE mode RL78 CPU core • CISC architecture with 3-stage pipeline • Minimum instruction execution time: Can be changed from high speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator) to ultra-low speed (66.6 μs: @ 15 kHz operation with low-speed on-chip oscillator clock) • Multiply/divide/multiply & accumulate instructions are supported. • Address space: 1 MB • General-purpose registe