W9725G8KB-18 - Winbond

Description:  Power Supply: VDD, VDDQ = 1.8 V ± 0.1V  Double Data Rate architecture: two data transfers per clock cycle  CAS Latency: 3, 4, 5, 6 and 7  Burst Length: 4 and 8  Bi-directional, differential data strobes (DQS and DQS ) are transmitted / received with data  Edge-aligned with Read data and center-aligned with Write data  DLL aligns DQ and DQS transitions with clock  Differential clock inputs (CLK and CLK )  Data masks (DM) for write data  Commands entered on each positive CLK edge, data