Part Image

85105AGILF - Renesas Electronics

Description: The 85105I is a low skew, high performance 1-to-5 Differential-to-0.7V HCSL Fanout Buffer. The 85105I has two selectable clock inputs. The CLK0, nCLK0 pair can accept most standard differential input levels. The single-ended CLK1 can accept LVCMOS or LVTTL input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 85105I ideal for th

Download 85105AGILF Model
Schematic
symbols
Schematic symbol is unavailable for download
PCB
footprints
PCB footprint is unavailable for download
3D
models
3D model is unavailable for download
PCB Footprints
85105AGILF - Renesas Electronics PCB footprint - Small Outline Packages - Small Outline Packages - PGG20
click to zoom
3D Models
85105AGILF - Renesas Electronics  - 3D model - Small Outline Packages - PGG20
click to zoom

85105AGILF Details

  • Manufacturer Part Number:

    85105AGILF

  • Brand Name:

    Renesas

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    TSSOP

  • Pin Count:

    20

  • Manufacturer Package Code:

    PGG20

  • Country Of Origin:

    Philippines, Taiwan

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Renesas Electronics Corporation

  • YTEOL:

    0

  • Logic IC Type:

    LOW SKEW CLOCK DRIVER

  • Moisture Sensitivity Level:

    1

  • Peak Reflow Temperature (Cel):

    260

  • Terminal Finish:

    MATTE TIN

  • Time@Peak Reflow Temperature-Max (s):

    30

85105AGILF Frequently Asked Questions (FAQs)

  • Renesas provides a recommended PCB layout guide in their application note (APL-AN-1201) which includes thermal design considerations, such as thermal vias, copper pours, and heat sink attachment.
  • Renesas recommends a specific power sequencing scheme in their datasheet, which involves powering up the VCC and VDD pins in a specific order. Additionally, they provide a power sequencing diagram in their application note (APL-AN-1202).
  • Renesas recommends using 0.1uF to 1uF decoupling capacitors with a voltage rating of 2.5V or higher, placed as close as possible to the VCC and VDD pins. They also suggest using a 10uF bulk capacitor for each power rail.
  • Renesas provides an I2C troubleshooting guide in their application note (APL-AN-1203), which includes steps for verifying the I2C bus signals, checking for bus contention, and debugging I2C transactions.
  • The 85105AGILF has an operating temperature range of -40°C to 125°C, but Renesas recommends derating the device's performance at temperatures above 85°C.

Trust Checks

This model has been built in collaboration with the manufacturer.
Manufacturer Collaborated
This model has been verified by system checks.
System Verified
This model has been reviewed by community users.
Community Approved
Sponsored

85105AGILF Overview

Use the download button to access the 85105AGILF schematic symbol, PCB footprint, and 3D model.
To find more CAD model downloads similar to this part, try a partial part number search, like 85105, or try a keyword search, such as Clock Drivers

Parts related to 85105AGILF

Showing 0 results