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97U2A877AHLFT - Renesas Electronics

Description: Low skew, low jitter PLL clock driver. 1 to 10 differential clock distribution (SSTL_18)

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97U2A877AHLFT - Renesas Electronics - PCB symbol
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PCB Footprints
97U2A877AHLFT - Renesas Electronics PCB footprint - BGA - BGA - 52-Ball BGA_JS
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3D Models
97U2A877AHLFT - Renesas Electronics - 3D model - BGA - 52-Ball BGA_JS
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97U2A877AHLFT Overview

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