AD7781BRZ - Analog Devices

AD7781BRZ Frequently Asked Questions (FAQs)

• What is the recommended layout and placement for the AD7781BRZ?
  The AD7781BRZ is a high-precision ADC, and its performance can be affected by the PCB layout and component placement. It is recommended to follow a star-grounding scheme, keep the analog and digital grounds separate, and place the ADC close to the analog signal sources. Additionally, decoupling capacitors should be placed close to the ADC's power pins.
• How do I optimize the AD7781BRZ's performance for low-noise applications?
  To optimize the AD7781BRZ's performance for low-noise applications, use a low-noise voltage reference, such as the ADR4520 or ADR4550. Also, ensure that the analog input signals are properly filtered and buffered, and that the ADC is operated in a low-noise mode (e.g., using the internal clock and disabling the internal PGA).
• What is the recommended calibration procedure for the AD7781BRZ?
  The AD7781BRZ has an internal calibration mechanism that can be initiated by writing to the CAL register. The calibration process involves a full-scale calibration, a zero-scale calibration, and a gain calibration. The calibration procedure should be performed after power-up and after any changes to the ADC's configuration.
• How do I handle the AD7781BRZ's digital output data?
  The AD7781BRZ's digital output data is in a 24-bit twos-complement format. The data should be read from the ADC's data register in a 24-bit word, with the most significant bit (MSB) first. The data can then be processed and converted to a more convenient format, such as a 32-bit integer or a floating-point number.
• What is the maximum sampling rate of the AD7781BRZ?
  The maximum sampling rate of the AD7781BRZ is 30 kSPS (kilosamples per second). However, the actual sampling rate may be limited by the system's clock frequency, the ADC's conversion time, and the data transfer rate.