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ADAU1761BCPZ - Analog Devices

Description: SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL

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ADAU1761BCPZ - Analog Devices PCB footprint - Quad Flat No-Lead - Quad Flat No-Lead - CP-32-4 (LFCSP)
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3D Models
ADAU1761BCPZ - Analog Devices  - 3D model - Quad Flat No-Lead - CP-32-4 (LFCSP)
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ADAU1761BCPZ Details

  • Manufacturer Part Number:

    ADAU1761BCPZ

  • Brand Name:

    Analog Devices Inc

  • Pbfree Code:

    No

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    QFN

  • Package Description:

    LFCSP-32

  • Pin Count:

    32

  • Manufacturer Package Code:

    CP-32-4

  • Country Of Origin:

    Singapore

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.31.00.01

  • Manufacturer:

    Analog Devices Inc

  • YTEOL:

    10

  • Consumer IC Type:

    CONSUMER CIRCUIT

  • JESD-30 Code:

    S-XQCC-N32

  • JESD-609 Code:

    e3

  • Length:

    5 mm

  • Moisture Sensitivity Level:

    3

  • Number of Functions:

    1

  • Number of Terminals:

    32

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Package Body Material:

    UNSPECIFIED

  • Package Code:

    HVQCCN

  • Package Equivalence Code:

    LCC32,.2SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE

  • Peak Reflow Temperature (Cel):

    260

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1 mm

  • Supply Voltage-Max (Vsup):

    3.65 V

  • Supply Voltage-Min (Vsup):

    1.8 V

  • Surface Mount:

    YES

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Time@Peak Reflow Temperature-Max (s):

    40

  • Width:

    5 mm

ADAU1761BCPZ Frequently Asked Questions (FAQs)

  • The recommended power-up sequence is to apply VDD first, followed by VDDIO, and then the clock signal. This ensures proper initialization of the device.
  • To configure the ADAU1761 for master clock mode, set the MCLK pin as an output by writing to the Clock Control Register (0x10). Then, set the desired clock frequency using the Clock Frequency Register (0x11).
  • The maximum allowed capacitance on the analog input pins is 10nF. Exceeding this value may affect the device's performance and stability.
  • To optimize the ADAU1761 for low-power operation, reduce the clock frequency, disable unused features, and adjust the power-down modes for the analog-to-digital converters and digital-to-analog converters.
  • Keep analog and digital signals separate, use a ground plane, and avoid crossing analog and digital signals. Use a 4-layer PCB with a dedicated analog ground plane and a dedicated digital ground plane.

Trust Checks

This model has been built in collaboration with the manufacturer.
Manufacturer Collaborated
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System Verified
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Sponsored

ADAU1761BCPZ Overview

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About Analog Devices

Analog Devices Inc. is a global leader in the design and manufacturing of analog, mixed-signal, and digital signal processing integrated circuits and software solutions for the industrial, automotive, healthcare, communications industries. Analog Devices serves a diverse range of markets including industrial, automotive, healthcare, energy, aerospace, defense, and consumer electronics industries. Analog Devices’ product portfolio includes a wide range of ICs, modules, and subsystems.

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