A 4-layer PCB with a solid ground plane and a separate power plane is recommended. Keep the RF signal traces short and away from the digital signal traces. Use a common mode filter or a pi-filter to reduce noise and EMI.
Use the ADIsimPLL tool to design and optimize the PLL loop filter. The tool provides a graphical interface to enter the desired PLL specifications and generates the optimal loop filter component values.
The maximum frequency deviation that can be achieved with the ADF4371BCCZ is ±20 MHz, which is limited by the charge pump current and the loop filter bandwidth.
Use the CAL pin to calibrate the device during power-up. The CAL pin should be tied to a digital output that goes high during power-up to initiate the calibration sequence.
The recommended power-up sequence is to first power up the digital supply (VDD), followed by the analog supply (AVDD), and then the charge pump voltage (VCP).
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ADF4371BCCZ Overview
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Analog Devices Inc. is a global leader in the design and manufacturing of analog, mixed-signal, and digital signal processing integrated circuits and software solutions for the industrial, automotive, healthcare, communications industries. Analog Devices serves a diverse range of markets including industrial, automotive, healthcare, energy, aerospace, defense, and consumer electronics industries.
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