AR0134CSSM00SUEA0-DPBR footprint, schematic symbol and 3D model by onsemi

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AR0134CSSM00SUEA0-DPBR Details

Manufacturer Part Number:
AR0134CSSM00SUEA0-DPBR
Brand Name:
onsemi
Pbfree Code:
Yes
Rohs Code:
Yes
Part Life Cycle Code:
Active
Part Package Code:
IBGA-63
Package Description:
9 X 9 MM, IBGA-63
Manufacturer Package Code:
503AG
Country Of Origin:
Taiwan
Factory Lead Time:
20 Weeks
Manufacturer:
onsemi
YTEOL:
6.3
Additional Feature:
ELECTRONIC ROLLING SHUTTER, IT ALSO OPERATES AT ANALOG SUPPLY VOLTAGE 2.5-3.1V
Array Type:
SINGLE FRAME
Body Breadth:
9 mm
Body Height:
1.4 mm
Body Length or Diameter:
9 mm
Dynamic Range:
64 dB
Frame Rate:
60 fps
Horizontal Pixel:
1280
JESD-609 Code:
e1
Master Clock:
50 MHz
Mounting Feature:
SURFACE MOUNT
Operating Current-Max:
60 mA
Operating Temperature-Max:
70 °C
Operating Temperature-Min:
-30 °C
Optical Format:
1/3 inch
Output Interface Type:
2-WIRE INTERFACE
Output Range:
-22-22mA
Output Type:
DIGITAL CURRENT
Package Shape/Style:
SQUARE
Pixel Size:
3.75 µm
Sensors/Transducers Type:
IMAGE SENSOR,CMOS
Spectral Response (nm):
350-1100
Supply Voltage-Max:
1.95 V
Supply Voltage-Min:
1.7 V
Surface Mount:
YES
Terminal Finish:
TIN/SILVER/COPPER (SN/AG/CU)
Termination Type:
SOLDER
Vertical Pixel:
960

The recommended PCB layout and thermal management guidelines can be found in the onsemi application note AND9313/D, which provides detailed information on PCB design, thermal management, and package handling.
To optimize the AR0134CSSM00SUEA0-DPBR's performance in low-light conditions, adjust the exposure time, gain, and black level calibration. Additionally, consider using a lens with a high f-number and optimizing the sensor's analog gain and digital gain settings.
The maximum clock frequency for the AR0134CSSM00SUEA0-DPBR is 72 MHz. Increasing the clock frequency can improve image quality but also increases power consumption. A lower clock frequency can reduce power consumption but may affect image quality.
Lens distortion correction can be implemented using software or hardware-based solutions. Software-based solutions involve using algorithms to correct for distortion, while hardware-based solutions use specialized ICs or FPGAs. Consult the onsemi application note AND9314/D for more information.
The recommended power-up sequence is: VDD (power supply), VAA (analog power supply), VDD_PLL (PLL power supply), and finally, the clock signal. The power-down sequence is the reverse of the power-up sequence.

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