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AUIRF7769L2TR - Infineon

Description: INFINEON - AUIRF7769L2TR - MOSFET, AUTO, N-CH, 100V, DIRECTFETL8

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Symbol
AUIRF7769L2TR - Infineon - PCB symbol
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PCB Footprints
AUIRF7769L2TR - Infineon PCB footprint - Other - Other - DIRECTFET L8
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3D Models
AUIRF7769L2TR - Infineon - 3D model - Other - DIRECTFET L8
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AUIRF7769L2TR Details

  • Manufacturer Part Number:

    AUIRF7769L2TR

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Country Of Origin:

    Malaysia, Mexico, Uk

  • ECCN Code:

    EAR99

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    6

  • Avalanche Energy Rating (Eas):

    260 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    100 V

  • Drain Current-Max (ID):

    20 A

  • Drain-source On Resistance-Max:

    0.0035 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-XBCC-N9

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    9

  • Operating Mode:

    ENHANCEMENT MODE

  • Package Body Material:

    UNSPECIFIED

  • Package Shape:

    RECTANGULAR

  • Package Style:

    CHIP CARRIER

  • Polarity/Channel Type:

    N-CHANNEL

  • Pulsed Drain Current-Max (IDM):

    500 A

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    BOTTOM

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

AUIRF7769L2TR Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for the AUIRF7769L2TR is -40°C to 150°C.
  • To ensure reliability, it's essential to follow proper thermal management, PCB design, and layout guidelines, as well as implement adequate cooling mechanisms to prevent overheating.
  • The recommended gate drive voltage for the AUIRF7769L2TR is between 10V to 15V, with a maximum voltage of 20V.
  • Yes, the AUIRF7769L2TR can be used in a half-bridge configuration, but it's essential to ensure proper dead-time management and synchronization to prevent shoot-through currents.
  • To minimize EMI, use proper PCB layout techniques, such as separating high-frequency and low-frequency circuits, using shielding, and implementing EMI filters.

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AUIRF7769L2TR Overview

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